DS21354L Maxim Integrated Products, DS21354L Datasheet - Page 63

• Manufacturer Part Number: DS21354L
• Description: IC TXRX E1 1-CHIP 3.3V 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21354L

• Function: Single-Chip Transceiver
• Interface: E1, HDLC
• Number Of Circuits: 1
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: Remote and AIS Alarm Detector / Generator
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power (watts): -

11.
The receive-channel blocking registers (RCBR1/RCBR2/RCBR3/RCBR4) and the transmit-channel
blocking registers (TCBR1/TCBR2/TCBR3/TCBR4) control the RCHBLK and TCHBLK pins,
respectively. (The RCHBLK and TCHBLK pins are user-programmable outputs that can be forced either
high or low during individual channels). These outputs can be used to block clocks to a USART or LAPD
controller in ISDN–PRI applications.
When the appropriate bits are set to one, the RCHBLK and TCHBLK pin will be held high during the
entire corresponding channel time. See the timing in Section
alternate mode of use. Via the CCR3.6 bit, the user has the option to use the TCBRs to determine on a
channel by channel basis, which signaling bits are to be inserted via the TSRs (the corresponding bit in
the TCBRs = 1) and which are to be sourced from the TSER or TSIG pins (the corresponding bit in the
TCBR = 0). See the timing in Section
RCBR1/RCBR2/RCBR3/RCBR4: RECEIVE CHANNEL BLOCKING REGISTERS
(Address = 2B to 2E Hex)
(MSB)
TCBR1/TCBR2/TCBR3/TCBR4: TRANSMIT CHANNEL BLOCKING REGISTERS
(Address = 22 to 25 Hex)
(MSB)
Note: If CCR3.6 = 1, then a zero in the TCBRs implies that signaling data is to be sourced from
TSER (or TSIG if CCR3.2 = 1), and a one implies that signaling data for that channel is to be
sourced from the Transmit Signaling (TS) registers. In this mode, the voice-channel numbering
scheme (CH1 to CH30) is used. See the following definition.
SYMBOL
SYMBOL
CH16
CH24
CH32
CH16
CH24
CH32
CH8
CH8
CH1 to
CH1 to
CH32
CH32
CLOCK BLOCKING REGISTERS
CH15
CH23
CH31
CH15
CH23
CH31
CH7
CH7
POSITION
RCBR1.0 to
POSITION
TCBR1.0 to
RCBR4.7
TCBR4.7
CH14
CH22
CH30
CH14
CH22
CH30
CH6
CH6
Receive Channel Blocking Control Bits.
0 = force the RCHBLK pin to remain low during this channel time
1 = force the RCHBLK pin high during this channel time
Transmit Channel Blocking Control Bits.
0 = force the TCHBLK pin to remain low during this channel time
1 = force the TCHBLK pin high during this channel time
CH13
CH21
CH29
CH13
CH21
CH29
CH5
CH5
18.2
for an example.
CH12
CH20
CH28
CH12
CH20
CH28
CH4
CH4
63 of 124
NAME AND DESCRIPTION
NAME AND DESCRIPTION
CH11
CH19
CH27
CH11
CH19
CH27
CH3
CH3
18
CH10
CH18
CH26
CH10
CH18
CH26
CH2
CH2
for an example. The TCBRs have
(LSB)
(LSB)
CH17
CH25
CH17
CH25
CH1
CH9
CH1
CH9
RCBR1 (2B)
RCBR3 (2D)
TCBR1 (22)
TCBR2 (23)
TCBR3 (24)
TCBR4 (25)
RCBR2 (2C)
RCBR4 (2E)