AT32UC3C1512C Atmel Corporation, AT32UC3C1512C Datasheet - Page 16

• Manufacturer Part Number: AT32UC3C1512C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C1512C

• Flash (kbytes): 512 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 81
• Ext Interrupts: 100
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 19
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 2-7.
16
Reg #
24
25
26
27
28
29
30
31
32
33-63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
AVR32
Address
96
100
104
108
112
116
120
124
128
132-252
256
260
264
268
272
276
280
284
288
292
296
300
304
308
312
316
320
324
328
332
336
340
344
348
352
356
System Registers (Continued)
Name
JAVA_LV1
JAVA_LV2
JAVA_LV3
JAVA_LV4
JAVA_LV5
JAVA_LV6
JAVA_LV7
JTBA
JBCR
Reserved
CONFIG0
CONFIG1
COUNT
COMPARE
TLBEHI
TLBELO
PTBR
TLBEAR
MMUCR
TLBARLO
TLBARHI
PCCNT
PCNT0
PCNT1
PCCR
BEAR
MPUAR0
MPUAR1
MPUAR2
MPUAR3
MPUAR4
MPUAR5
MPUAR6
MPUAR7
MPUPSR0
MPUPSR1
Function
Java Local Variable 1
Java Local Variable 2
Java Local Variable 3
Java Local Variable 4
Java Local Variable 5
Java Local Variable 6
Java Local Variable 7
Java Trap Base Address
Java Write Barrier Control Register
Reserved for future use
Configuration register 0
Configuration register 1
Cycle Counter register
Compare register
MMU TLB Entry High
MMU TLB Entry Low
MMU Page Table Base Register
MMU TLB Exception Address Register
MMU Control Register
MMU TLB Accessed Register Low
MMU TLB Accessed Register High
Performance Clock Counter
Performance Counter 0
Performance Counter 1
Performance Counter Control Register
Bus Error Address Register
MPU Address Register region 0
MPU Address Register region 1
MPU Address Register region 2
MPU Address Register region 3
MPU Address Register region 4
MPU Address Register region 5
MPU Address Register region 6
MPU Address Register region 7
MPU Privilege Select Register region 0
MPU Privilege Select Register region 1
Compliance
OA
OA
OA
OA
OA
OA
OA
OA
OA
-
RA
RA
RA
RA
OA
OA
OA
OA
OA
OA
OA
OA
OA
OA
OA
OA
OA
OA
OA
OA
OA
OA
OA
OA
OA
OA
32000D–04/2011
OB
OB
OB
OB
OB
OB
OB
OB
OB
-
RB
RB
RB
RB
OB
OB
OB
OB
OB
OB
OB
OB
OB
OB
OB
OB
OB
OB
OB
OB
OB
OB
OB
OB
OB
OB