ATmega32C1 Automotive Atmel Corporation, ATmega32C1 Automotive Datasheet - Page 220

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ATmega32C1 Automotive

Manufacturer Part Number
ATmega32C1 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega32C1 Automotive

Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
17.5.11
17.5.12
17.5.13
220
Atmel ATmega16/32/64/M1/C1
Break-in-data
Checksum
Interrupts
CHECKSUM
=
255
According to the LIN protocol, the LIN/UART controller can detect the BREAK/SYNC field
sequence even if the break is partially superimposed with a byte of the response. When a
BREAK/SYNC field sequence happens, the transfer in progress is aborted and the processing
of the new frame starts.
On the slave node, the BREAK detection is processed with the synchronization setting avail-
able when the LIN/UART controller processed the (aborted) response. But the
re-synchronization restarts as usual. Due to a possible difference of timing reference between
the BREAK field and the rest of the frame, the time-out values can be slightly inaccurate.
The last field of a frame is the checksum.
In LIN 2.1, the checksum contains the inverted eight bit sum with carry over all data bytes and
the protected identifier. This calculation is called enhanced checksum.
In LIN 1.3, the checksum contains the inverted eight bit sum with carry over all data bytes.
This calculation is called classic checksum.
Frame identifiers 60 (0x3C) to 61 (0x3D) shall always use classic checksum
As shown in
are combined to drive two interrupts. Each of these flags have their respective enable interrupt
bit in LINENIR register.
(see
218).
• On slave node(s), an error is generated (i.e. LBERR in case of Tx Response or LFERR in
• On master node, the user (code) is responsible for this aborting of frame. To do this, the
case of Rx Response). Information on data error is also available, refer to the
17.5.7.5.
master task has first to abort the on-going communication (clearing LCMD bits - LIN Abort
command) and then to apply the Tx Header command. In this case, the abort error flag -
LABORT - is set.
unsigned char
Section 17.5.8 “xxOK Flags” on page 218
CHECKSUM
Figure 17-13 on page
n
0
DATA n
=
255
+
unsigned char
PROTECTED ID.
221, the four communication flags of the LINSIR register
n
0
DATA n
+
unsigned char
and
+
unsigned char
Section 17.5.9 “xxERR Flags” on page
n
0
DATA n
n
0
DATA n
+
PROTECTED ID.
»
8
7647G–AVR–09/11
Section
»
8

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