ATmega32C1 Automotive Atmel Corporation, ATmega32C1 Automotive Datasheet - Page 64

• Manufacturer Part Number: ATmega32C1 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega32C1 Automotive

• Flash (kbytes): 32 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 27
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Can: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

9.2.2
9.2.3
9.2.4
64
Atmel ATmega16/32/64/M1/C1
Toggling the Pin
Switching Between Input and Output
Reading the Pin Value
The port pins are tri-stated when reset condition becomes active, even if no clocks are
running.
If PORTxn is written logic one when the pin is configured as an output pin, the port pin is
driven high (one). If PORTxn is written logic zero when the pin is configured as an output pin,
the port pin is driven low (zero).
Writing a logic one to PINxn toggles the value of PORTxn, independent on the value of
DDRxn. Note that the SBI instruction can be used to toggle one single bit in a port.
When switching between tri-state ({DDxn, PORTxn} = 0b00) and output high ({DDxn,
PORTxn} = 0b11), an intermediate state with either pull-up enabled {DDxn, PORTxn} = 0b01)
or output low ({DDxn, PORTxn} = 0b10) must occur. Normally, the pull-up enabled state is fully
acceptable, as a high-impedant environment will not notice the difference between a strong
high driver and a pull-up. If this is not the case, the PUD bit in the MCUCR Register can be set
to disable all pull-ups in all ports.
Switching between input with pull-up and output low generates the same problem. The user
must use either the tri-state ({DDxn, PORTxn} = 0b00) or the output high state ({DDxn,
PORTxn} = 0b11) as an intermediate step.
Table 9-1
Table 9-1.
Independent of the setting of Data Direction bit DDxn, the port pin can be read through the
PINxn Register bit. As shown in
constitute a synchronizer. This is needed to avoid metastability if the physical pin changes
value near the edge of the internal clock, but it also introduces a delay.
timing diagram of the synchronization when reading an externally applied pin value. The max-
imum and minimum propagation delays are denoted t
DDxn
0
0
0
1
1
summarizes the control signals for the pin value.
PORTxn
0
1
1
0
1
Port Pin Configurations
(in MCUCR)
PUD
X
0
1
X
X
Figure
Output
Output
Input
Input
Input
I/O
9-2, the PINxn Register bit and the preceding latch
Pull-up
Yes
No
No
No
No
pd,max
Comment
Default configuration after Reset.
Tri-state (Hi-Z)
Pxn will source current if ext. pulled low.
Tri-state (Hi-Z)
Output Low (Sink)
Output High (Source)
and t
pd,min
respectively.
Figure 9-3
7647G–AVR–09/11
shows a