ATmega32C1 Automotive Atmel Corporation, ATmega32C1 Automotive Datasheet - Page 290

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ATmega32C1 Automotive

Manufacturer Part Number
ATmega32C1 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega32C1 Automotive

Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
24.7.11
24.7.12
24.7.13
290
Atmel ATmega16/32/64/M1/C1
Preventing Flash Corruption
Programming Time for Flash when Using SPM
Simple Assembly Code Example for a Boot Loader
During periods of low V
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First,
a regular write sequence to the Flash requires a minimum voltage to operate correctly. Sec-
ondly, the CPU itself can execute instructions incorrectly, if the supply voltage for executing
instructions is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
The calibrated RC Oscillator is used to time Flash accesses.
gramming time for Flash accesses from the CPU.
Table 24-6.
Flash write (Page Erase, Page Write,
and write Lock bits by SPM)
1. If there is no need for a Boot Loader update in the system, program the Boot Loader
2. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
3. Keep the AVR core in Power-down sleep mode during periods of low V
.equ PAGESIZEB = PAGESIZE*2
.org SMALLBOOTSTART
Write_page:
Lock bits to prevent any Boot Loader software updates.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating
voltage matches the detection level. If not, an external low V
can be used. If a reset occurs while a write operation is in progress, the write opera-
tion will be completed provided that the power supply voltage is sufficient.
prevent the CPU from attempting to decode and execute instructions, effectively pro-
tecting the SPMCSR Register and thus the Flash from unintentional writes.
;-the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y pointer
; the first data location in Flash is pointed to by the Z-pointer
;-error handling is not included
;-the routine must be placed inside the Boot space
; (at least the Do_spm sub routine). Only code inside NRWW section can
; be read during Self-Programming (Page Erase and Page Write).
;-registers used: r0, r1, temp1 (r16), temp2 (r17), looplo (r24),
; loophi (r25), spmcrval (r20)
; storing and restoring of registers is not included in the routine
; register usage can be optimized at the expense of code size
;-It is assumed that either the interrupt table is moved to the Boot
; loader section or that the interrupts are disabled.
; Page Erase
ldi
call Do_spm
; re-enable the RWW section
spmcrval, (1<<PGERS) | (1<<SPMEN)
SPM Programming Time
Symbol
CC
, the Flash program can be corrupted because the supply voltage is
;PAGESIZEB is page size in BYTES, not words
Min Programming Time
3.7 ms
Table 24-6
CC
reset protection circuit
Max Programming Time
shows the typical pro-
CC
4.5 ms
. This will
7647G–AVR–09/11

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