ATmega32C1 Automotive Atmel Corporation, ATmega32C1 Automotive Datasheet - Page 254

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ATmega32C1 Automotive

Manufacturer Part Number
ATmega32C1 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega32C1 Automotive

Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
18.11 Amplifier Control Registers
18.11.1
254
Atmel ATmega16/32/64/M1/C1
Amplifier 0 Control and Status register – AMP0CSR
The configuration of the amplifiers are controlled via two dedicated registers AMP0CSR and
AMP1CSR. Then the start of conversion is done via the ADC control and status registers.
The conversion result is stored on ADCH and ADCL register which contain respectively the
most significant bits and the less significant bits.
Bit
Read/Write
Initial Value
• Bit 7 – AMP0EN: Amplifier 0 Enable Bit
Set this bit to enable the Amplifier 0.
Clear this bit to disable the Amplifier 0.
Clearing this bit while a conversion is running will take effect at the end of the conversion.
Warning: Always clear AMP0TS0:1 when clearing AMP0EN.
• Bit 6 – AMP0IS: Amplifier 0 Input Shunt
Set this bit to short-circuit the Amplifier 0 input.
Clear this bit to normally use the Amplifier 0.
• Bit 5, 4 – AMP0G1, 0: Amplifier 0 Gain Selection Bits
These 2 bits determine the gain of the amplifier 0.
The different setting are shown in
Table 18-8.
To ensure an accurate result, after the gain value has been changed, the amplifier input needs
to have a quite stable input value during at least 4 Amplifier synchronization clock periods.
• Bit 3 – AMPCMP0: Amplifier 0 - Comparator 0 connection
Set this bit to connect the amplifier 0 to the comparator 0 positive input. In this configuration
the comparator clock is twice the amplifier clock.
Clear this bit to normally use the Amplifier 0.
• Bit 2:0 – AMP0TS2,AMP0TS1,AMP0TS0: Amplifier 0 Clock Source Selection Bits
In accordance with the Table 18-9, these 3 bits select the event which will generate the clock
for the amplifier 0. This clock source is necessary to start the conversion on the amplified
channel.
AMP0G1
0
0
1
1
AMP0EN
Amplifier 0 Gain Selection
AMP0G0
0
1
0
1
R/W
7
0
AMP0IS
R/W
6
0
Description
Gain 5
Gain 10
Gain 20
Gain 40
AMP0G1
R/W
Table
5
0
18-8.
AMP0G0
R/W
4
0
AMPCMP0
R/W
3
0
AMP0TS2
R/W
2
0
AMP0TS1
R/W
1
0
AMP0TS0
R/W
0
0
7647G–AVR–09/11
AMP0CSR

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