ATmega64 Atmel Corporation, ATmega64 Datasheet - Page 143

• Manufacturer Part Number: ATmega64
• Manufacturer: Atmel Corporation

Specifications of ATmega64

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

ATmega64(L)
• Bit 5 – ICF3: Timer/Counter3, Input Capture Flag
This flag is set when a capture event occurs on the ICP3 pin. When the Input Capture Register
(ICR3) is set by the WGM3:0 to be used as the TOP value, the ICF3 flag is set when the counter
reaches the TOP value.
ICF3 is automatically cleared when the Input Capture 3 Interrupt Vector is executed. Alterna-
tively, ICF3 can be cleared by writing a logic one to its bit location.
• Bit 4 – OCF3A: Timer/Counter3, Output Compare A Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the Output
Compare Register A (OCR3A).
Note that a Forced Output Compare (FOC3A) strobe will not set the OCF3A flag.
OCF3A is automatically cleared when the Output Compare Match 3 A Interrupt Vector is exe-
cuted. Alternatively, OCF3A can be cleared by writing a logic one to its bit location.
• Bit 3 – OCF3B: Timer/Counter3, Output Compare B Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the Output
Compare Register B (OCR3B).
Note that a Forced Output Compare (FOC3B) strobe will not set the OCF3B flag.
OCF3B is automatically cleared when the Output Compare Match 3 B Interrupt Vector is exe-
cuted. Alternatively, OCF3B can be cleared by writing a logic one to its bit location.
• Bit 2 – TOV3: Timer/Counter3, Overflow Flag
The setting of this flag is dependent of the WGM3:0 bits setting. In Normal and CTC modes, the
TOV3 flag is set when the timer overflows. Refer to
Table 52 on page 104
for the TOV3 flag
behavior when using another WGM3:0 bit setting.
TOV3 is automatically cleared when the Timer/Counter3 Overflow Interrupt Vector is executed.
Alternatively, OCF3B can be cleared by writing a logic one to its bit location.
• Bit 1 – OCF3C: Timer/Counter3, Output Compare C Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the Output
Compare Register C (OCR3C).
Note that a Forced Output Compare (FOC3C) strobe will not set the OCF3C flag.
OCF3C is automatically cleared when the Output Compare Match 3 C Interrupt Vector is exe-
cuted. Alternatively, OCF3C can be cleared by writing a logic one to its bit location.
• Bit 0 – OCF1C: Timer/Counter1, Output Compare C Match Flag
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Output
Compare Register C (OCR1C).
Note that a Forced Output Compare (FOC1C) strobe will not set the OCF1C flag.
OCF1C is automatically cleared when the Output Compare Match 1 C Interrupt Vector is exe-
cuted. Alternatively, OCF1C can be cleared by writing a logic one to its bit location.
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