ATmega64 Atmel Corporation, ATmega64 Datasheet - Page 53

• Manufacturer Part Number: ATmega64
• Manufacturer: Atmel Corporation

Specifications of ATmega64

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Power-on Reset
2490Q–AVR–06/10
A Power-on Reset (POR) pulse is generated by an On-chip Detection circuit. The detection level
is defined in
POR circuit can be used to trigger the Start-up Reset, as well as to detect a failure in supply
voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after V
when V
Figure 23. MCU Start-up, RESET Tied to V
Figure 24. MCU Start-up, RESET Extended Externally
INTERNAL
INTERNAL
TIME-OUT
TIME-OUT
CC
RESET
RESET
2. V
RESET
RESET
V
V
decreases below the detection level.
CC
CC
this is the case, the device is tested down to V
antees that a Brown-out Reset will occur before V
operation of the microcontroller is no longer guaranteed. The test is performed using
BODLEVEL=1 for ATmega64L and BODLEVEL=0 for ATmega64. BODLEVEL=1 is not appli-
cable for ATmega64.
BOT
Table
may be below nominal minimum operating voltage for some devices. For devices where
19. The POR is activated whenever V
V
V
V
POT
POT
RST
CC
t
TOUT
rise. The RESET signal is activated again, without any delay,
CC
V
RST
t
TOUT
CC
= V
BOT
CC
CC
is below the detection level. The
during the production test. This guar-
drops to a voltage where correct
ATmega64(L)
53