ATmega64 Atmel Corporation, ATmega64 Datasheet - Page 3

• Manufacturer Part Number: ATmega64
• Manufacturer: Atmel Corporation

Specifications of ATmega64

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Overview
The ATmega64 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing
powerful instructions in a single clock cycle, the ATmega64 achieves throughputs approaching 1 MIPS per MHz, allowing
the system designer to optimize power consumption versus processing speed.
Block Diagram
Figure 2. Block Diagram
The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly
connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction
executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times
faster than conventional CISC microcontrollers.
2490Q–AVR–06/10
AVCC
AREF
PEN
GND
VCC
ON-CHIP DEBUG
PROGRAMMING
BOUNDARY-
JTAG TAP
LOGIC
SCAN
DATA REGISTER
DATA REGISTER
PORTE
PORTF
USART0
PORTF DRIVERS
PORTE DRIVERS
PE0 - PE7
PF0 - PF7
INSTRUCTION
INSTRUCTION
PROGRAM
COUNTER
PROGRAM
REGISTER
CONTROL
DECODER
FLASH
LINES
ADC
REG. PORTE
REG. PORTF
DATA DIR.
DATA DIR.
REGISTERS
PURPOSE
REGISTER
GENERAL
POINTER
STATUS
STACK
SRAM
DATA REGISTER
DATA REGISTER
ALU
X
Y
Z
PORTA
PORTB
PORTB DRIVERS
PORTA DRIVERS
PA0 - PA7
PB0 - PB7
REG. PORTB
REG. PORTA
DATA DIR.
DATA DIR.
MCU CONTROL
OSCILLATOR
WATCHDOG
COUNTERS
INTERRUPT
REGISTER
INTERNAL
EEPROM
TIMER/
TIMER
UNIT
SPI
DATA REGISTER
DATA REGISTER
PORTC
OSCILLATOR
OSCILLATOR
TIMING AND
CALIB. OSC
CONTROL
PORTD
PORTC DRIVERS
USART1
PC0 - PC7
PORTD DRIVERS
PD0 - PD7
REG. PORTC
DATA DIR.
2-WIRE SERIAL
REG. PORTD
INTERFACE
DATA DIR.
8-BIT DATA BUS
DATA REG.
PORTG
ATmega64(L)
PORTG DRIVERS
PG0 - PG4
REG. PORTG
DATA DIR.
RESET
XTAL1
XTAL2
3