SAM7S32 Atmel Corporation, SAM7S32 Datasheet - Page 666
SAM7S32
Manufacturer Part Number
SAM7S32
Description
Manufacturer
Atmel Corporation
Specifications of SAM7S32
Flash (kbytes)
32 Kbytes
Pin Count
48
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
21
Ext Interrupts
21
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
2
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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40.11.12 Voltage Regulator
40.11.12.1
40.11.12.2
40.11.13 Watchdog Timer (WDT)
40.11.13.1
40.11.13.2
666
SAM7S Series
Voltage Regulator: Current Consumption in Deep Mode
Voltage Regulator: Load Versus Temperature
WDT: The Watchdog Timer May Lock the Device in a Reset State
WDT: The Watchdog Timer Status Register and Interrupt
Add an inverter.
Current consumption in Deep Mode is maximum 60 µA instead of 25 µA.
Due to current rejection from VDDIN to VDDCORE, the current consumption in Deep Mode can-
not be guaranteed. Instead, 60 µA is guaranteed whatever the condition.
None.
Maximum load is 50 mA at 85 °C (instead of 100 mA).
Maximum load is 100 mA at 70°C.
None.
Under certain rare circumstances, if the Watchdog Timer is used with the Watchdog Reset
enabled (WDRSTEN set at 1), the Watchdog Timer may lock the device in a reset state when
the user restarts the watchdog (WDDRSTT). The only way to recover from this state is a power-
on reset. The issue depends on the values of WDD and WDV in the WDT_MR register.
Two workarounds are possible.
Under certain rare circumstances, if the Watchdog Timer is used with the Watchdog Fault Inter-
rupt enabled (WDFIEN set at 1), the Watchdog Timer may trigger the interrupt (wdt_fault)
erroneously. The Watchdog Timer Status Register may be wrong also (WDERR and WDUNF).
The issue depends on the values of WDD and WDV in the WDT_MR register.
Two workarounds are possible.
1. Either do not use the Watchdog Timer with the Watchdog Reset enabled (WDRSTEN
2. or set WDD to 0xFFF and in addition use only one of the following values for WDV:
1. Either do not use the Watchdog Timer with the Watchdog fault Interrupt enabled
2. or set WDD to 0xFFF and in addition use only one of the following values for WDV:
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
set at 1),
0xFFF, 0xDFF, 0xBFF, 0x9FF, 0x7FF, 0x77F, 0x6FF, 0x67F, 0x5FF, 0x57F, 0x4FF,
0x47F, 0x3FF, 0x37F, 0x2FF, 0x27F, 0x1FF, 0x1BF, 0x17F, 0x13F, 0x0FF, 0x0DF, 0x0BF,
0x09F, 0x07F, 0x06F, 0x05F, 0x04F, 0x03F, 0x037, 0x02f, 0x027, 0x01F, 0x01B, 0x017,
0x013 and 0x00F.
(WDFIEN set at 1),
0xFFF, 0xDFF, 0xBFF, 0x9FF, 0x7FF, 0x77F, 0x6FF, 0x67F, 0x5FF, 0x57F, 0x4FF,
6175L–ATARM–28-Jul-11
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