SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 31

• Manufacturer Part Number: SAM9XE512
• Manufacturer: Atmel Corporation

Specifications of SAM9XE512

• Flash (kbytes): 512 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

9.5
9.6
9.7
9.8
9.9
6254C–ATARM–22-Jan-10
Clock Generator
Power Management Controller
Periodic Interval Timer
Watchdog Timer
Real-time Timer
• Embeds a low power 32,768 Hz slow clock oscillator and a low-power RC oscillator
• Embeds the main oscillator
• Embeds 2 PLLs
• Provides:
• Five flexible operating modes:
• Includes a 20-bit Periodic Counter, with less than 1 µs accuracy
• Includes a 12-bit Interval Overlay Counter
• Real Time OS or Linux
• 16-bit key-protected only-once-Programmable Counter
• Windowed, prevents the processor to be in a dead-lock on the watchdog access
• Real-time Timer with 32-bit free-running back-up counter
• Integrates a 16-bit programmable prescaler running on slow clock
• Alarm Register capable to generate a wake-up of the system through the Shutdown
selectable with OSCSEL signal
Controller
– Provides the permanent slow clock SLCK to the system
– Oscillator bypass feature
– Supports 3 to 20 MHz crystals
– PLL A outputs 80 to 240 MHz clock
– PLL B outputs 70 MHz to 130 MHz clock
– Both integrate an input divider to increase output accuracy
– PLLB embeds its own filter
– the Processor Clock PCK
– the Master Clock MCK, in particular to the Matrix and the memory interfaces
– the USB Device Clock UDPCK
– independent peripheral clocks, typically at the frequency of MCK
– 2 programmable clock outputs: PCK0, PCK1
– Normal Mode, processor and peripherals running at a programmable frequency
– Idle Mode, processor stopped waiting for an interrupt
– Slow Clock Mode, processor and peripherals running at low frequency
– Standby Mode, mix of Idle and Backup Mode, peripheral running at low frequency,
– Backup Mode, Main Power Supplies off, VDDBU powered by a battery
processor stopped waiting for an interrupt
AT91SAM9XE128/256/512 Preliminary
®
/WindowsCE
®
compliant tick generator
31