SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 47

• Manufacturer Part Number: SAM9XE512
• Manufacturer: Atmel Corporation

Specifications of SAM9XE512

• Flash (kbytes): 512 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

11.3.7
6254C–ATARM–22-Jan-10
ARM9EJ-S Registers
The ARM9EJ-S core has a total of 37 registers.
Table 11-2
Table 11-2.
The ARM state register set contains 16 directly-accessible registers, r0 to r15, and an additional
register, the Current Program Status Register (CPSR). Registers r0 to r13 are general-purpose
registers used to hold either data or address values. Register r14 is used as a Link register that
holds a value (return address) of r15 when BL or BLX is executed. Register r15 is used as a pro-
gram counter (PC), whereas the Current Program Status Register (CPSR) contains condition
code flags and the current mode bits.
In privileged modes (FIQ, Supervisor, Abort, IRQ, Undefined), mode-specific banked registers
(r8 to r14 in FIQ mode or r13 to r14 in the other modes) become available. The corresponding
banked registers r14_fiq, r14_svc, r14_abt, r14_irq, r14_und are similarly used to hold the val-
System Mode
• 31 general-purpose 32-bit registers
• 6 32-bit status registers
User and
CPSR
R10
R11
R12
R13
R14
PC
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
shows all the registers in all modes.
ARM9TDMI Modes and Registers Layout
SPSR_SVC
Supervisor
R13_SVC
R14_SVC
CPSR
Mode
R10
R11
R12
PC
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
AT91SAM9XE128/256/512 Preliminary
SPSR_ABOR
R13_ABORT
R14_ABORT
Abort Mode
CPSR
R10
R11
R12
PC
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
T
SPSR_UNDE
R13_UNDEF
R14_UNDEF
Undefined
CPSR
Mode
R10
R11
R12
PC
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
F
Mode-specific banked registers
SPSR_IRQ
R13_IRQ
R14_IRQ
Interrupt
CPSR
Mode
R10
R11
R12
PC
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
Fast Interrupt
SPSR_FIQ
R10_FIQ
R11_FIQ
R12_FIQ
R13_FIQ
R14_FIQ
R8_FIQ
R9_FIQ
CPSR
Mode
PC
R0
R1
R2
R3
R4
R5
R6
R7
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