SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 845

• Manufacturer Part Number: SAM9XE512
• Manufacturer: Atmel Corporation

Specifications of SAM9XE512

• Flash (kbytes): 512 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Revision History
6254C–ATARM–22-Jan-10
Doc
Rev.
6254C
Comments
Overview:
Table 3-1, “Signal Description
removed. Cross reference referring to PIO Multiplexing added to these signals.
Table 10-3, “Multiplexing on PIO Controller
Table 10-4, “Multiplexing on PIO Controller
Figure 8-1 “AT91SAM9XE128/256/512 Memory
Section 6.1 “ERASE
Section 7.2.2 “Matrix Slaves”
Slave order changed in
Section 8.1.4 “ROM Topology”
Section 8.1.4.1 “Fast Flash Programming
Table 3-1, “Signal Description
Section 9.2 “Reset
Section 8.2.5 “I/O Drive
GLobal: KB rewritten as -Kbyte or Kbytes, MB as Mbytes or -Mbyte (conform to style guide; lit° 3363B)
EFC:
Section 20.3.3.2 “Write
“Example of Partial Page
EMAC:
Section 38. “Ethernet MAC 10/100 (EMAC)”
FFPI:
Figure 14-1 “Parallel Programming Interface”
TST is connected to VDDBU, added PGMEN3.
Table 14-1, “Signal Description List”
Backup Power supply, TST is connected to by VDDBU, added PGMEN3.
Section 14.2.3 “Entering Programming Mode”
removed VDDFLASH from algorithm.
MATRIX:
Section 21.6.1 “EBI Chip Select Assignment
VDDIOMSEL.
SHDWC:
Section 19.6.3 “Shutdown Status
SMC:
Table 23-8, “Register
Section 23.8.6 “Reset Values of Timing
In the tables that follow the most recent version of the document appears first.
Controller”, added: “At reset the NRST pin is an output”.
Pin”, ERASE pin is powered by VDDIOP0 rail.
Mapping”, SMC_CYCLE reset is 0x00030003.
Commands”, added consraint on partial programming mode below
Table 7-2
Selection”, added to datasheet.
Programming”.
and
List”, PCKx, DBGU, AIC, PIOC, USART, SSC, TC, SPI, TWI voltage references
List”, PGMEN[3:0] replaces PGMEN[2:0].
and
Register”, bitfield 16 contains RTTWK.
Section 7.2.3 “Masters to Slaves Access”
and
Figure 8-2 “ROM Boot Memory
and
Table 7-3
Parameters”, replaced redundant Table 23-5 with ref. to
AT91SAM9XE128/256/512 Preliminary
Table 14-17, “Signal Description
Interface”, added PA3.
B”, PB16 to PB21, Peripheral A column updated.
C”, PC0 to PC3, Power Supply column updated.
WOL bit description and other related text removed from section. 6789
Register”, bitfield [17:16] changed to EBI_DRIVE, replaces
and
and
Mapping”, GPBR addresses changed.
Figure 14-4 “Serial
Section 14.3.2 “Entering Serial Programming
Table
Map”, added PA3.
Programming”, removed VDDFLASH,
8-1, added PGMEN3 and PA3.
List”, removed VDDFLASH, added
Figure 20-7
Table
Mode”,
23-8.
Change
Request
Ref.
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