SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 848

• Manufacturer Part Number: SAM9XE512
• Manufacturer: Atmel Corporation

Specifications of SAM9XE512

• Flash (kbytes): 512 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

848
Doc.
Rev
6254B
AT91SAM9XE128/256/512 Preliminary
Comments (Continued)
SMC:
Section 23.8.5 “Coding Timing
Table 23-4 on page
Section 23.9.3.1 “User
added.
TWI:
Section 33.5.1 “I/O
Programmer interdiction added to TWD and TWCK.
Section 33.10.6 “TWI Status
USART:
Manchester Encoding/Decoding is available in this implementation of the USART (not visible in 6254A).
Electrical Characteristics:
Table 43-11, “32 kHz Oscillator Characteristics”
Table 43-15, “Main Oscillator
updated Startup Time parameter, V
Section 43.6
Table 43-2, “DC
Section 43.8 “Core Power Supply POR
Table 43-25, “Maximum MCK Frequency vs. Embedded Flash Wait States”
Operations column removed, values assigned to Max MCK Frequency columns
Table 43-17, “PLLA Characteristics
Table 43-9, “XIN Clock Electrical
Section 43.4 “Clock
Section 43.14 “EMAC
Table 43-21, “Analog
Mechanical Characteristics:
Table 44-1, “Soldering Information (Substrate Level),” on page
Errata:
Section 46.2 “AT91SAM9XE128/256/512 Errata - Revision A parts”
Former Errata - Revision B parts replaced and become Errata - Revision A parts. Former Errata - Revision A
parts removed from Errata
Section 46.2.3.2 “MCI: SDIO Interrupt does not work with slots other than
Section 46.2.6.1 “SSC: Clock is Transmitted before the SSC is
Section 46.2.6.1 “SPI: Bad Serial Clock Generation on second chip_select when SCBR = 1, CPOL = 1 and
NCPHA =
Section 46.2.6.2 “SPI: Software Reset must be Written
Section 46.2.4 “Reset Controller
Section 46.2.5 “Static Memory Controller
Section 46.2.5 “Static Memory Controller (SMC)”
0”, added to SPI errata.
“ADC”, section added to datasheet
Characteristics”, V
Lines”, TWD and TWCK open drain status and condition updated.
209.
Characteristics”,
Inputs”, ADC input capacitance is 12 pF TYP, 14 pF MAX.
Timings”,
Procedure”, instructions regarding configuration parameters of SMC Chip Select
Register”, GACC bit description updated.
Characteristics”, updated Typ values for C
Parameters”, “Effective Value” column under “Permitted Range” updated in
Section 43.15 “Peripheral
(RSTC)”, added to errata.
Characteristics”, line added for V
VDDIOM
(1)
DDPLL
”
Section 43.12 “SMC
FOUT Min &M ax updated
Characteristics”, added to datasheet.
= 1.65V to 1.95V.
(SMC)”, added to errata.
Condition column cleared.
added to errata.
Twice”, added to SPI errata.
Timings”,
Timings”, added to datasheet.
833, updated title.
Enabled”, added to SSC errata.
IN
.
Section 43.13
LEXT
A”, syntax updated.
,
FWS rows 5, 6 removed, Read
“SDRAMC”,
6254C–ATARM–22-Jan-10
Change
Request
Ref.
5604
5621
5343
rfo
5773
5930
5335
5345
5789
5562
5800
5298 &
5923/6189
5924
6049
6167
rfo
6242
5288
5922
6169
5439
rfo
5958
5925
6085
5642