AD9467 Analog Devices, AD9467 Datasheet - Page 7

• Manufacturer Part Number: AD9467
• Description: 16-Bit, 200 MSPS/250 MSPS Analog-to-Digital Converter
• Manufacturer: Analog Devices

Specifications of AD9467

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 250MSPS
• Interface: LVDS,Par
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: (2Vref) p-p,2 V p-p,2.5V p-p
• Adc Architecture: Pipelined,Subranging
• Pkg Type: CSP

SWITCHING SPECIFICATIONS
AVDD1 = 1.8 V, AVDD2 = 3.3 V, AVDD3 = 1.8 V, DRVDD = 1.8 V, specified maximum sampling rate, 2.5 V p-p differential input, 1.25 V
internal reference, AIN = −1.0 dBFS, DCS on, default SPI settings, unless otherwise noted.
Table 4.
Parameter
CLOCK
OUTPUT PARAMETERS
APERTURE
1
2
3
Timing Diagrams
Data Sheet
See the
Can be adjusted via the SPI interface.
Measurements were made using a part soldered to FR-4 material.
Clock Rate
Clock Pulse Width High (t
Clock Pulse Width Low (t
Propagation Delay (t
Rise Time (t
Fall Time (t
DCO Propagation Delay (t
DCO to Data Delay (t
Wake-Up Time (Power-Down)
Pipeline Latency
Aperture Delay (t
Aperture Uncertainty (Jitter)
Out-of-Range Recovery Time
2
AN-835
1
D14–/D15– (MSB)
D14+/D15+ (MSB)
F
R
) (20% to 80%)
D0+/D1+ (MSB)
Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and how these tests were completed.
D0–/D1– (MSB)
) (20% to 80%)
A
)
DCO+
DCO–
CLK+
CLK–
. .
.
2, 3
PD
SKEW
VIN±
)
)
CL
CPD
CH
)
)
)
N – 1
t
CH
D15
D1
Temp
Full
Full
Full
25°C
25°C
25°C
25°C
Full
Full
Full
25°C
25°C
25°C
t
CL
D14
D0
N
Figure 2. 16-Bit Output Data Timing
t
A
1/fs
D15
Min
−200
50
D1
t
CPD
t
t
SKEW
PD
Rev. C | Page 7 of 32
AD9467BCPZ-200
N + 1
D14
D0
Typ
3
200
200
3
1.2
60
1
2.5
2.5
100
16
D15
D1
N + 2
D14
D0
Max
200
+200
D15
D1
Min
−200
50
N + 3
D14
D0
AD9467BCPZ-250
D15
D1
60
1
Typ
2
2
3
200
200
3
100
16
1.2
N + 4
D14
D0
Max
250
+200
D15
D1
N + 5
D14
D0
Unit
MSPS
ns
ns
ns
ps
ps
ns
ps
ms
Clock cycles
ns
fs rms
Clock cycles
AD9467