AD9641 Analog Devices, AD9641 Datasheet - Page 9

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AD9641

Manufacturer Part Number
AD9641
Description
14-Bit, 80 MSPS/155 MSPS, 1.8 V Serial Output Analog-to-Digital Converter (ADC)
Manufacturer
Analog Devices
Datasheet

Specifications of AD9641

Resolution (bits)
14bit
# Chan
1
Sample Rate
80MSPS
Interface
Ser
Analog Input Type
Diff-Bip
Ain Range
1.75 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 8. Pin Function Descriptions
Pin No.
ADC Power Supplies
ADC Analog
Digital Inputs
Digital Outputs
SPI Control
ADC Configuration
12, 16, 18, 19
1, 3, 6, 8, 26, 27, 30, 31, 32
2, 23
11, 13, 17
0
29
28
25
4
5
7
10
9
15
14
21
20
22
24
Mnemonic
DRVDD
AVDD
DNC
DRGND
AGND, Exposed pad
VIN+
VIN−
VCM
CLK+
CLK−
SYNC
DSYNC+
DSYNC−
DOUT+
DOUT−
SCLK
SDIO
CSB
PDWN
NOTES
1. DNC = DO NOT CONNECT.
2. THE EXPOSED THERMAL PAD ON THE BOTTOM OF THE PACKAGE
PROVIDES THE ANALOG GROUND FOR THE PART. THIS EXPOSED PAD
MUST BE CONNECTED TO GROUND FOR PROPER OPERATION.
AVDD
AVDD
AVDD
AVDD
Figure 4. LFCSP Pin Configuration (Top View)
SYNC
CLK+
CLK–
DNC
Type
Supply
Supply
Driver ground
Ground
Input
Input
Output
Input
Input
Input
Input
Input
Output
Output
Input
Input/output
Input
Input
1
2
3
4
5
6
7
8
Rev. B | Page 9 of 36
(Not to Scale)
PIN 1
INDICATOR
AD9641
TOP VIEW
Description
Digital Output Driver Supply (1.8 V Nominal).
Analog Power Supply (1.8 V Nominal).
Do Not Connect.
Digital Driver Supply Ground.
The exposed thermal pad on the bottom of the package provides
the analog ground for the part. This exposed pad must be connected
to ground for proper operation.
Differential Analog Input Pin (+).
Differential Analog Input Pin (−).
Common-Mode Level Bias Output.
ADC Clock Input—True.
ADC Clock Input—Complement.
Input Clock Divider Synchronization Pin.
Active Low JESD204A LVDS Sync Input—True/Active Low
JESD204A CMOS Sync Input.
Active Low JESD204A LVDS Sync Input—Complement.
CML Output Data—True.
CML Output Data—Complement.
SPI Serial Clock.
SPI Serial Data I/O.
SPI Chip Select (Active Low).
Power-Down Input. Using the SPI interface, this input can be
configured as power-down or standby.
24
23
22
21
20
19
18
17
PDWN
DNC
CSB
SCLK
SDIO
DRVDD
DRVDD
DRGND
AD9641

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