AD7192 Analog Devices, AD7192 Datasheet - Page 23

• Manufacturer Part Number: AD7192
• Description: 4.8 kHz Ultra-Low Noise 24-Bit Sigma-Delta ADC with PGA
• Manufacturer: Analog Devices

Specifications of AD7192

• Resolution (bits): 24bit
• # Chan: 4
• Sample Rate: 4.8kSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Bip,Diff-Uni,SE-Bip,SE-Uni
• Ain Range: ± (Vref/Gain)
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

Table 20. Channel Selection
CH7
1
DATA REGISTER
(RS2, RS1, RS0 = 0, 1, 1; Power-On/Reset = 0x000000)
The conversion result from the ADC is stored in this data
register. This is a read-only, 24-bit register. On completion of a
read operation from this register, the RDY pin/bit is set. When
the DAT_STA bit in the mode register is set to 1, the contents of
the status register are appended to each 24-bit conversion. This
is advisable when several analog input channels are enabled
because the three LSBs of the status register (CHD2 to CHD0)
identify the channel from which the conversion originated.
Channel Enable Bits in the Configuration Register
CH6
1
CH5
1
CH4
1
CH3
1
CH2
1
CH1
1
CH0
1
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Positive Input
AIN(+)
AIN1
AIN3
AIN2
AIN1
AIN2
AIN3
AIN4
Temperature sensor
Channel Enabled
ID REGISTER
(RS2, RS1, RS0 = 1, 0, 0; Power-On/Reset = 0xX0)
The identification number for the AD7192 is stored in the ID
register. This is a read-only register.
AIN2
AIN4
AIN2
AINCOM
AINCOM
AINCOM
AINCOM
Negative Input
AIN(−)
Status Register
Bits CHD[2:0]
000
001
010
011
100
101
110
111
Calibration
Register Pair
0
1
None
0
0
1
2
3
AD7192