AD7192 Analog Devices, AD7192 Datasheet - Page 3

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AD7192

Manufacturer Part Number
AD7192
Description
4.8 kHz Ultra-Low Noise 24-Bit Sigma-Delta ADC with PGA
Manufacturer
Analog Devices
Datasheet

Specifications of AD7192

Resolution (bits)
24bit
# Chan
4
Sample Rate
4.8kSPS
Interface
Ser,SPI
Analog Input Type
Diff-Bip,Diff-Uni,SE-Bip,SE-Uni
Ain Range
± (Vref/Gain)
Adc Architecture
Sigma-Delta
Pkg Type
SOP

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SPECIFICATIONS
AV
T
Table 1.
Parameter
ADC
A
Output Data Rate
No Missing Codes
Resolution
RMS Noise and Output Data Rates
Integral Nonlinearity
Offset Error
Offset Error Drift vs. Temperature
Offset Error Drift vs. Time
Gain Error
Gain Drift vs. Temperature
Gain Drift vs. Time
Power Supply Rejection
Common-Mode Rejection
Normal Mode Rejection
DD
= T
Gain = 1
Gain > 1
@ DC
@ DC
@ 50 Hz, 60 Hz
@ 50 Hz, 60 Hz
Sinc
= 3 V to 5.25 V, DV
MIN
Internal Clock
4
@ 50 Hz, 60 Hz
@ 50 Hz
@ 60 Hz
2
Filter
to T
4
2
4, 5
MAX
, unless otherwise noted.
2
2
2
DD
2
= 2.7 V to 5.25 V, AGND = DGND = 0 V; REFINx(+) = AV
AD7192B
4.7 to 4800
1.17 to 1200
1.56 to 1600
24
24
±10
±15
±30
±30
±150/gain
±0.5
±150/gain
±5
±5
25
±0.001
−0.39
±0.003
±0.005
±1
10
90
95
100
110
120
120
100
74
96
97
Rev. A | Page 3 of 40
nV/°C typ
Unit
Hz nom
Hz nom
Hz nom
Bits min
Bits min
ppm of FSR max
ppm of FSR max
ppm of FSR max
ppm of FSR max
μV typ
μV typ
nV/°C typ
nV/°C typ
nV/1000 hours typ
% typ
% typ
% typ
% typ
ppm/°C typ
ppm/1000 hours typ
dB typ
dB min
dB min
dB min
dB min
dB min
dB min
dB min
dB min
dB min
DD
, REFINx(−) = AGND, MCLK = 4.92 MHz,
Test Conditions/Comments
Chop disabled
Chop enabled, sinc
Chop enabled, sinc
FS > 1, sinc
FS > 4, sinc
See the RMS Noise and Resolution section
See the RMS Noise and Resolution section
±2 ppm typical, AV
±2 ppm typical, AV
±5 ppm typical, AV
±12 ppm typical, AV
Chop disabled
Chop enabled
Gain = 1 to 16; chop disabled
Gain = 32 to 128; chop disabled
Chop enabled
Gain > 32
AV
calibration conditions)
Gain = 128, before full-scale calibration (see
Table 23)
Gain > 1, after internal full-scale calibration,
AV
Gain > 1, after internal full-scale calibration,
AV
Gain = 1.
Gain = 1, V
Gain > 1, V
Gain = 1, V
Gain > 1, V
10 Hz output data rate, 50 ± 1 Hz, 60 ± 1 Hz.
50 ± 1 Hz (50 Hz output data rate), 60 ± 1 Hz
(60 Hz output data rate).
10 Hz output data rate, 50 ± 1 Hz, 60 ± 1 Hz.
50 Hz output data rate, REJ60
50 ± 1 Hz, 60 ± 1 Hz.
50 Hz output data rate, 50 ± 1 Hz.
60 Hz output data rate, 60 ± 1 Hz.
DD
DD
DD
= 5 V, gain = 1, T
≥ 4.75 V.
< 4.75 V
IN
IN
IN
IN
4
3
filter
filter
= 1 V.
= 1 V/gain, 110 dB typ.
= 1 V.
= 1 V/gain.
3
3
DD
DD
DD
4
3
DD
filter
filter
= 5 V
= 3 V
= 5 V
A
= 3 V
= 25°C (factory
1
6
= 1,
AD7192

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