ADUC834 Analog Devices, ADUC834 Datasheet - Page 46

• Manufacturer Part Number: ADUC834
• Description: Precision Analog Microcontroller: 1MIPS 8052 MCU + 62kB Flash + 16/24-Bit ADC + 12-Bit DAC
• Manufacturer: Analog Devices

Specifications of ADUC834

• Mcu Core: 8052
• Mcu Speed (mips): 1
• Sram (bytes): 2304Bytes
• Gpio Pins: 34
• Adc # Channels: 4
• Other: PWM

ADuC834
I
The ADuC834 supports a fully licensed* I
I
master. SDATA (Pin 27) is the data I/O pin and SCLOCK
(Pin 26) is the serial clock. These two pins are shared with the
Three SFRs are used to control the I
I2CCON
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
I2CADD
Function
SFR Address
Power-On Default Value
Bit Addressable
I2CDAT
Function
SFR Address
Power-On Default Value
Bit Addressable
* Purchase of licensed I
2
2
Patent Rights to use these components in an I
C SERIAL INTERFACE
C interface is implemented as a full hardware slave and software
Name
MDO
MDE
MCO
MDI
I2CM
I2CRS
I2CTX
I2CI
2
C components of Analog Devices or one of its sublicensed associated companies conveys a license for the purchaser under the Philips I
I
Holds the I
at
9BH
55H
No
I
The I2CDAT SFR is written by the user to transmit data over the I
read data just received by the I
interrupt and the I2CI bit in the I2CCON SFR. User software should only access I2CDAT once per
interrupt cycle.
9AH
00H
No
2
2
C Address Register
C Data Register
www.analog.com/microconverter
Description
I
This data bit is used to implement a master I
bit will be outputted on the SDATA pin if the data output enable (MDE) bit is set.
I
Set by the user to enable the SDATA pin as an output (Tx).
Cleared by the user to enable SDATA pin as an input (Rx).
I
This data bit is used to implement a master I
this bit will be outputted on the SCLOCK pin.
I
This data bit is used to implement a master I
pin is latched into this bit on SCLOCK if the data output enable (MDE) bit is 0.
I
Set by the user to enable I
Cleared by user to enable I
I
Set by the user to reset the I
Cleared by user code for normal I
I
Set by the MicroConverter if the interface is transmitting.
Cleared by the MicroConverter if the interface is receiving.
I
Set by the MicroConverter after a byte has been transmitted or received.
Cleared automatically when the user code reads the I2CDAT SFR (see I2CDAT below).
2
2
2
2
2
2
2
2
C Software Master Data Output Bit (Master Mode Only).
C Software Master Data Output Enable Bit (Master Mode Only).
C Software Master Clock Output Bit (Master Mode Only).
C Software Master Data Input Bit (Master Mode Only).
C Master/Slave Mode Bit.
C Reset Bit (Slave Mode Only).
C Direction Transfer Bit (Slave Mode Only).
C Interrupt Bit (Slave Mode Only).
2
I
E8H
00H
Yes
C interface. These are described below.
2
2
C system provided that the system conforms to the I
C Control Register
2
C peripheral address for the part. It may be overwritten by the user code. Application Note uC001
2
C serial interface. The
Table XXII. I2CCON SFR Bit Designations
2
2
C interface. Accessing I2CDAT automatically clears any pending I
C software master mode.
2
C hardware slave mode.
2
C interface.
–46–
describes the format of the I
2
C operation.
MOSI and SCLOCK pins of the on-chip SPI interface. Therefore
the user can only enable one or the other interface at any given
time (see SPE in Table XXI). Application Note uC001 describes
the operation of this interface as implemented and is available from
the MicroConverter website at www.analog.com/microconverter.
2
C transmitter interface in software. Data written to this
2
C receiver interface in software. Data on the SDATA
2
C transmitter interface in software. Data written to
2
C Standard Specification as defined by Philips.
2
C standard 7-bit address in detail.
2
C interface or read by user code to
REV. A
2
C
2
C