ADUC834 Analog Devices, ADUC834 Datasheet - Page 60

• Manufacturer Part Number: ADUC834
• Description: Precision Analog Microcontroller: 1MIPS 8052 MCU + 62kB Flash + 16/24-Bit ADC + 12-Bit DAC
• Manufacturer: Analog Devices

Specifications of ADUC834

• Mcu Core: 8052
• Mcu Speed (mips): 1
• Sram (bytes): 2304Bytes
• Gpio Pins: 34
• Adc # Channels: 4
• Other: PWM

ADuC834
BAUD RATE GENERATION USING TIMER 3
The high integer dividers in a UART block means that high
speed baud rates are not always possible using some particular
crystals. e.g., using a 12 MHz crystal, a baud rate of 115200 is
not possible. To address this problem the ADuC834 has added
a dedicated baud rate timer (Timer 3) specifically for generating
highly accurate baud rates.
Timer 3 can be used instead of Timer 1 or Timer 2 for generating
very accurate high speed UART baud rates including 115200
and 230400. Timer 3 also allows a much wider range of baud
rates to be obtained. In fact, every desired bit rate from 12 bits
to 393216 bits can be generated to within an error of ± 0.8%.
Timer 3 also frees up the other three timers allowing them to be
used for different applications. A block diagram of Timer 3 is
shown in Figure 57.
Two SFRs (T3CON and T3FD) are used to control Timer 3.
T3CON is the baud rate control SFR, allowing Timer 3 to be
used to set up the UART baud rate, and setting up the binary
divider (DIV).
Bit
7
6
5
4
3
2
1
0
FRACTIONAL
*THE CORE CLOCK IS THE OUTPUT OF THE PLL (SEE "ON-CHIP PLL")
DIVIDER
Name
T3EN
–––
–––
–––
–––
DIV2
DIV1
DIV0
CORE
CLK*
Table XXXIII. T3CON SFR Bit Designations
Figure 57. Timer 3, UART Baud Rates
(1 + T3FD/64)
2
16
DIV
2
Description
Set to enable Timer 3 to generate the baud
rate. When set PCON.7, T2CON.4 and
T2CON.5 are ignored. Cleared to let the baud
rate be generated as per a standard 8052.
Reserved for future use
Reserved for future use
Reserved for future use
Reserved for future use
Binary Divider Factor
DIV2
0
0
0
0
1
1
1
1
T3 RX/TX
CLOCK
RX CLOCK (FIG 56)
TIMER 1/TIMER 2
DIV1
0
0
1
1
0
0
1
1
1
1
TX CLOCK (FIG 56)
0
0
TIMER 1/TIMER 2
DIV0
0
1
0
1
0
1
0
1
T3EN
Bin Divider
1
2
4
8
16
32
64
128
TX CLOCK
RX
CLOCK
–60–
The appropriate value to write to the DIV2-1-0 bits can be
calculated using the following formula where f
of the PLL as described in the “On-Chip PLL” description.
Note: The DIV value must be rounded down.
T3FD is the fractional divider ratio required to achieve the
required baud rate. We can calculate the appropriate value for
T3FD using the following formula.
Note: T3FD should be rounded to the nearest integer.
Once the values for DIV and T3FD are calculated, the actual
baud rate can be calculated using the following formula:
For a baud rate of 115200 while operating from the maximum
core frequency (CD = 0) we have:
Therefore, the actual baud rate is 115439 bits.
Ideal
Baud
230400
115200
115200
57600
57600
57600
38400
38400
38400
38400
19200
19200
19200
19200
19200
9600
9600
9600
9600
9600
9600
38400
T FD
Table XXXIV. Commonly Used Baud Rates Using Timer 3
3
DIV
=
(
=
2 12 582912
Actual Baud Rate
CD
0
0
1
0
1
2
0
1
2
3
0
1
2
3
4
0
1
2
3
4
5
0
log
×
(
T FD
12582912 32 115200
.
3
DIV
0
1
0
2
1
0
DIV
3
2
1
0
4
3
2
1
0
5
4
3
2
1
0
3
=
=
log
2
)
DIV
/



(
2
2
32
1
=
×
×
×
×
2
log
Baud Rate
T3CON
80H
81H
80H
82H
81H
80H
83H
82H
81H
80H
84H
83H
82H
81H
80H
85H
84H
83H
82H
81H
80H
83H
×
f
115200
CORE
DIV
f
Baud Rate
CORE
( )
2
2
×
×
(
T FD
)
)
f
/ log
3
CORE
−
−
64
T3FD
2DH
2DH
2DH
2DH
2DH
2DH
12H
12H
12H
12H
12H
12H
12H
12H
12H
12H
12H
12H
12H
12H
12H
12H



64
CORE
2 1 77 1
+
=
=
64
45 22 2
is the output
.
)
.
REV. A
=
%
Error
0.2
0.2
0.2
0.2
0.2
0.2
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
=
Dh