ADP1879 Analog Devices, ADP1879 Datasheet - Page 21

• Manufacturer Part Number: ADP1879
• Description: Synchronous Buck Controller with Constant On-Time and Valley Current Mode with Power Saving Mode
• Manufacturer: Analog Devices

Data Sheet
HICCUP MODE DURING SHORT CIRCUIT
A current-limit violation occurs when the current across the
source and drain of the low-side MOSFET exceeds the current-
limit setpoint. When 32 current-limit violations are detected,
the controller enters idle mode and turns off the MOSFETs for
6 ms, allowing the converter to cool down. Then, the controller
reestablishes soft start and begins to cause the output to ramp
up again (see Figure 73). While the output ramps up, the current
sense amplifier output is monitored to determine if the violation is
still present. If it is still present, the idle event occurs again, followed
by the full chip, power-down sequence. This cycle continues
until the violation no longer exists. If the violation disappears,
the converter is allowed to switch normally, maintaining
regulation.
SYNCHRONOUS RECTIFIER
The
the external high- and low-side MOSFETs. The low-side
synchronous rectifier not only improves overall conduction
efficiency, but it also ensures proper charging of the bootstrap
capacitor located at the high-side driver input. This is beneficial
during startup to provide sufficient drive signal to the external
high-side MOSFET and to attain fast turn-on response, which is
essential for minimizing switching losses. The integrated high-
and low-side MOSFET drivers operate in complementary
fashion with built-in anti cross conduction circuitry to prevent
unwanted shoot through current that may potentially damage the
MOSFETs or reduce efficiency because of excessive power loss.
ADP1879 POWER SAVING MODE (PSM)
A power saving mode is provided in the ADP1879. The
operates in the discontinuous conduction mode (DCM) and
pulse skips at light to medium load currents. The controller outputs
pulses as necessary to maintain output regulation. Unlike the
continuous conduction mode (CCM), DCM operation prevents
negative current, thus allowing improved system efficiency at
light loads. Current in the reverse direction through this pathway,
however, results in power dissipation and, therefore, a decrease in
efficiency.
ADP1878/ADP1879
employ internal MOSFET drivers for
CURRENT
ZERO
CLIM
HS
Figure 73. Idle Mode Entry Sequence Due to Current-Limit Violation
REPEATED CURRENT-LIMIT
VIOLATION DETECTED
ADP1879
Rev. 0 | Page 21 of 40
A PREDETERMINED NUMBER
OF PULSES IS COUNTED TO
ALLOW THE CONVERTER
TO COOL DOWN
To minimize the chance of negative inductor current buildup,
an on-board zero-cross comparator turns off all high- and low-
side switching activities when the inductor current approaches
the zero current line, causing the system to enter idle mode,
where the high- and low-side MOSFETs are turned off. To ensure
idle mode entry, a 10 mV offset, connected in series at the SW
node, is implemented (see Figure 75).
As soon as the forward current through the low-side MOSFET
decreases to a level where
the zero-cross comparator (or I
turn off the low-side MOSFET. From this point, the slope of the
inductor current ramping down becomes steeper (see Figure 76)
as the body diode of the low-side MOSFET begins to conduct
current and continues conducting current until the remaining
energy stored in the inductor has been depleted.
I
LOAD
HS
LS
0A
10 mV = I
Figure 75. Zero-Cross Comparator with 10 mV of Offset
Figure 74. Discontinuous Mode of Operation (DCM)
t
ON
COMPARATOR
ZERO-CROSS
Q2
× R
REINITIALIZED TO
MONITOR IF THE
SOFT START IS
STILL EXISTS
VIOLATION
ON(Q2)
t
OFF
LS
REV
10mV
ADP1878/ADP1879
comparator) emits a signal to
AS THE INDUCTOR
CURRENT APPROACHES
ZERO CURRENT, THE STATE
MACHINE TURNS OFF THE
LOWER-SIDE MOSFET.
SW
Q2
HS AND LS ARE OFF
OR IN IDLE MODE
I
Q2