ADP1879 Analog Devices, ADP1879 Datasheet - Page 26

• Manufacturer Part Number: ADP1879
• Description: Synchronous Buck Controller with Constant On-Time and Valley Current Mode with Power Saving Mode
• Manufacturer: Analog Devices

ADP1878/ADP1879
EFFICIENCY CONSIDERATION
An important criteria to consider in constructing a dc-to-dc
converter is efficiency. By definition, efficiency is the ratio of the
output power to the input power. For high power applications at
load currents of up to 20 A, the following are important MOSFET
parameters that aid in the selection process:





The following are the losses experienced through the external
component during normal switching operation:





Channel Conduction Loss
During normal operation, the bulk of the loss in efficiency is due
to the power dissipated through MOSFET channel conduction.
Power loss through the high-side MOSFET is directly proportional
to the duty cycle (D) for each switching period, and the power
loss through the low-side MOSFET is directly proportional to
1 − D for each switching period. The selection of MOSFETs is
governed by the maximum dc load current that the converter is
expected to deliver. In particular, the selection of the low-side
MOSFET is dictated by the maximum load current because a
typical high current application employs duty cycles of less than
50%. Therefore, the low-side MOSFET is in the on state for
most of the switching period.
MOSFET Driver Loss
Other dissipative elements are the MOSFET drivers. The con-
tributing factors are the dc current flowing through the driver
during operation and the Q
where:
C
C
I
V
minus the rectifier drop (see Figure 83)).
V
BIAS
upperFET
lowerFET
DR
REG
is the dc current flowing into the high- and low-side drivers.
is the driver bias voltage (that is, the low input voltage (V
V
and the source that starts channel conduction.
R
conduction.
Q
C
C
Channel conduction loss (both of the MOSFETs).
MOSFET driver loss.
MOSFET switching loss.
Body diode conduction loss (low-side MOSFET).
Inductor loss (copper and core loss).
P
(f
is the bias voltage.
DR(LOSS)
DS (ON)
N1
N2
SW
GS (TH)
G
1, 2
is the input gate capacitance of the low-side MOSFET.
is the input gate capacitance of the high-side MOSFET.
is the total gate charge.
C
is the input capacitance of the high-side switch.
is the input capacitance of the low-side switch.
lowerFET
is the MOSFET voltage applied between the gate
is the on resistance of the MOSFET during channel
= [V
V
REG
DR
× (f
+ I
SW
BIAS
1
C
GATE
)]
upperFET
parameter of the external MOSFETs.
V
1
DR
+ I
BIAS
)] + [V
2
REG
×
REG
Rev. 0 | Page 26 of 40
)
MOSFET Switching Loss
The SW node transitions due to the switching activities of the
high- and low-side MOSFETs. This causes removal and reple-
nishing of charge to and from the gate oxide layer of the MOSFET,
as well as to and from the parasitic capacitance associated with
the gate oxide edge overlap and the drain and source terminals.
The current that enters and exits these charge paths presents
additional loss during these transition times. This can be approxi-
mately quantified by using the following equation, which represents
the time in which charge enters and exits these capacitive regions:
where:
C
R
The ratio of this time constant to the period of one switching cycle
is the multiplying factor to be used in the following expression:
or
Body Diode Conduction Loss
The
that prevents the high- and low-side MOSFETs from conducting
current simultaneously. This overlap control is beneficial, avoiding
large current flow that may lead to irreparable damage to the
external components of the power stage. However, this blanking
period comes with the trade-off of a diode conduction loss
occurring immediately after the MOSFETs change states and
continuing well into idle mode.
TOTAL
GATE
800
720
640
560
480
400
320
240
160
ADP1878/ADP1879
80
t
P
Figure 83. Internal Rectifier Voltage Drop vs. Switching Frequency
SW-TRANS
300
is the gate input resistance of the external MOSFET.
SW(LOSS)
is the C
= f
= R
400
GD
V
V
V
SW
REG
REG
REG
GATE
+ C
× R
= 2.7V
= 3.6V
= 5.5V
SWITCHING FREQUENCY (kHz)
GS
-TRANS
500
× C
GATE
of the external MOSFET.
TOTAL
employ anti cross conduction circuitry
× C
600
TOTAL
× I
700
LOAD
× V
800
2
IN
Data Sheet
× 2
900
+125°C
+25°C
–40°C
1000