LPC2939 NXP Semiconductors, LPC2939 Datasheet - Page 31

• Manufacturer Part Number: LPC2939
• Description: The LPC2939 combine an ARM968E-S CPU core with two integrated TCM blocksoperating at frequencies of up to 125 MHz, Full-speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 14.
LPC2939_3
Product data sheet
Pin name
USB_CONNECT2 O
USB_UP_LED2
USB_PWRD2
USB_PPWR2
USB_OVRCR2
USB OTG port pins
6.12.1 General subsystem clock description
6.12.2 Chip and feature identification
6.12.3 System Control Unit (SCU)
6.12.4 Event router
6.11.5 Clock description
6.12 General subsystem
Direction
O
I
O
I
Access to the USB registers is clocked by the CLK_SYS_USB, derived from
BASE_SYS_CLK, see
the USB block, BASE_USB_CLK and BASE_USB_I2C_CLK (see
The general subsystem is clocked by CLK_SYS_GESS, see
The Chip/Feature ID (CFID) module contains registers which show and control the
functionality of the chip. It contains an ID to identify the silicon and also registers
containing information about the features enabled or disabled on the chip.
The key features are:
The CFID has no external pins.
The system control unit contains system related functions.The key feature is configuration
of the I/O port pins multiplexer. It defines the function of each I/O pin of the LPC2939. The
I/O pin configuration should be consistent with peripheral function usage.
The SCU has no external pins.
The event router provides bus-controlled routing of input events to the vectored interrupt
controller for use as interrupt or wake-up signals.
Key features:
•
•
•
•
•
•
Identification of product
Identification of features enabled
Up to 22 level-sensitive external interrupt pins, including the receive pins of SPI, CAN,
LIN, USB, and UART, as well as the I
sources
Input events can be used as interrupt source either directly or latched (edge-detected)
Direct events disappear when the event becomes inactive
Latched events remain active until they are explicitly cleared
…continued
Description
SoftConnect control signal
GoodLink LED control signal
port power status
port power enable
over-current status
All information provided in this document is subject to legal disclaimers.
Section
Rev. 03 — 7 April 2010
6.7.2. The CGU1 provides two independent base clocks to
ARM9 microcontroller with CAN, LIN, and USB
2
C-bus SCL pins plus three internal event
Interfacing
-
-
USB host
USB host
USB host
Section
Section
6.7.2.
LPC2939
© NXP B.V. 2010. All rights reserved.
6.16.3).
31 of 99