STM8S103F3 STMicroelectronics, STM8S103F3 Datasheet - Page 17

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STM8S103F3

Manufacturer Part Number
STM8S103F3
Description
Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8S103F3

Program Memory
8 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles
Data Memory
640 bytes true data EEPROM; endurance 300 kcycles
Ram
1 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization
STM8S103K3 STM8S103F3 STM8S103F2
4.13
4.14
4.14.1
Analog-to-digital converter (ADC1)
The STM8S003xx products contain a 10-bit successive approximation A/D converter (ADC1)
with up to 5 external multiplexed inputs channels and the following features:
The STM8S103xx family products contain a 10-bit successive approximation A/D converter
(ADC1) with up to 5 external multiplexed input channels and the following main features:
Communication interfaces
The following communication interfaces are implemented:
UART1
Main features
Asynchronous communication (UART mode)
Input voltage range: 0 to V
Conversion time: 14 clock cycles
Single and continuous and buffered continuous conversion modes
Buffer size (n x 10 bits) where n = number of input channels
Scan mode for single and continuous conversion of a sequence of channels
Analog watchdog capability with programmable upper and lower thresholds
Analog watchdog interrupt
External trigger input
Trigger from TIM1 TRGO
End of conversion (EOC) interrupt
UART1: Full feature UART, synchronous mode, SPI master mode, Smartcard mode, IrDA
mode, single wire mode, LIN2.1 master capability
SPI : Full and half-duplex, 8 Mbit/s
I²C: Up to 400 Kbit/s
One Mbit/s full duplex SCI
SPI emulation
High precision baud rate generator
Smartcard emulation
IrDA SIR encoder decoder
LIN master mode
Single wire half duplex mode
Full duplex communication - NRZ standard format (mark/space)
Programmable transmit and receive baud rates up to 1 Mbit/s (f
following any standard baud rate regardless of the input frequency
Separate enable bits for transmitter and receiver
Two receiver wakeup modes:
DD
DocID15441 Rev 7
CPU
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Product overview
17/113

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