STM8S103F3 STMicroelectronics, STM8S103F3 Datasheet - Page 81

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STM8S103F3

Manufacturer Part Number
STM8S103F3
Description
Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8S103F3

Program Memory
8 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles
Data Memory
640 bytes true data EEPROM; endurance 300 kcycles
Ram
1 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

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STM8S103K3 STM8S103F3 STM8S103F2
1. Measurement points are made at CMOS levels: 0.3 VDD and 0.7 VDD.
(1)
(2)
(3)
production.
(4)
time to validate the data.
(5)
maximum time to put the data in Hi-Z.
Min time is for the minimum time to drive the output and the max time is for the maximum
Parameters are given by selecting 10 MHz I/O output frequency.
Data characterization in progress.
Values based on design simulation and/or characterization results, and not tested in
Min time is for the minimum time to invalidate the output and the max time is for the
OUT P UT
OUT P UT
NSS input
NSS input
CPHA= 0
CPOL=0
CPHA= 0
CPOL=1
CPHA=1
CPOL=0
CPHA=1
CPOL=1
I NPUT
I NPUT
MISO
MOSI
MISO
MOSI
t SU(NSS)
t a(SO)
t SU(NSS)
t a(SO)
Figure 38: SPI timing diagram - slave mode and CPHA = 0
Figure 39: SPI timing diagram - slave mode and CPHA = 1
t su(SI)
t w(SCKH)
t w(SCKL)
t w(SCKH)
t w(SCKL)
t su(SI)
MS B O UT
t v(SO)
M SB IN
M SB IN
t h(SI)
MS B O UT
DocID15441 Rev 7
t c(SCK)
t v(SO)
t h(SI)
t c(SCK)
BI T6 OUT
B I T1 IN
t h(SO)
B I T1 IN
BI T6 OUT
t h(SO)
LSB IN
t r(SCK)
t f(SCK)
LSB OUT
Electrical characteristics
t r(SCK)
t f(SCK)
t h(NSS)
t h(NSS)
LSB IN
LSB OUT
t dis(SO)
t dis(SO)
ai14134
ai14135
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