STM8S103F3 STMicroelectronics, STM8S103F3 Datasheet - Page 24

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STM8S103F3

Manufacturer Part Number
STM8S103F3
Description
Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8S103F3

Program Memory
8 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles
Data Memory
640 bytes true data EEPROM; endurance 300 kcycles
Ram
1 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

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Pinout and pin description
5.2.3
24/113
Pin no.
TSSOP/SO20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
UFQFPN20
18
19
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
STM8S103Fx TSSOP20/SO20/UFQFPN20 pin description
Pin name
PD4/ BEEP/
TIM2_ CH1/
UART1 _CK
PD5/ AIN5/
UART1 _TX
PD6/ AIN6/
UART1 _RX
NRST
PA1/ OSCIN
PA2/ OSCOUT
V SS
VCAP
V DD
PA3/ TIM2_ CH3
[SPI_ NSS]
PB5/ I
[TIM1_ BKIN]
PB4/ I
PC3/ TIM1_CH3
[TLI] [TIM1_
CH1N]
PC4/ CLK_CCO/
TIM1_
CH4/AIN2/[TIM1_
CH2N]
PC5/ SPI_SCK
[TIM2_ CH1]
PC6/ SPI_MOSI
[TIM1_ CH1]
PC7/ SPI_MISO
[TIM1_ CH2]
PD1/ SWIM
PD2/AIN3/[TIM2_
CH3]
PD3/ AIN4/ TIM2_
CH2/ ADC_ ETR
2
2
C_ SDA
C_ SCL
(2)
Type
I/O
I/O
I/O
I/O
I/O
I/O
S
S
S
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Table 6: STM8S103Fx pin description
Input
floating
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
wpu
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
DocID15441 Rev 7
Ext.
interr.
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Output
High sink
(1)
HS
HS
HS
HS
HS
HS
HS
HS
HS
HS
HS
HS
Speed
O3
O3
O3
O1
O1
O3
O1
O1
O3
O3
O3
O3
O3
O4
O3
O3
STM8S103K3 STM8S103F3 STM8S103F2
OD
X
X
X
X
X
X
T
(3)
T
(3)
X
X
X
X
X
X
X
X
PP
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Main
function
(after
reset)
Port D4
Port D5
Port D6
Reset
Port A1
Port A2
Digital ground
1.8 V regulator capacitor
Digital power supply
Port A3
Port B5
Port B4
Port C3
Port C4
Port C5
Port C6
Port C7
Port D1
Port D2
Port D3
Default
alternate
function
Timer 2 -
channel
1/BEEP output/
UART1 clock
Analog input 5/
UART1 data
transmit
Analog input 6/
UART1 data
receive
Resonator/
crystal in
Resonator/
crystal out
Timer 2
channel 3
I
I
Timer 1 -
channel 3
Configurable
clock
output/Timer 1
- channel
4/Analog input
2
SPI clock
SPI master
out/slave in
SPI master in/
slave out
SWIM data
interface
Analog input 3
Analog input 4/
Timer 2 -
channel 2/ADC
external trigger
2
2
C data
C clock
Alternate function
after remap [option
bit]
SPI master/ slave
select [AFR1]
Timer 1 - break
input [AFR4]
ADC external
trigger [AFR4]
Top level interrupt
[AFR3] Timer 1 -
inverted channel 1
[AFR7]
Timer 1 - inverted
channel 2 [AFR7]
Timer 2 - channel 1
[AFR0]
Timer 1 - channel 1
[AFR0]
Timer 1 - channel 2
[AFR0]
Timer 2 - channel 3
[AFR1]

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