ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 122
ST7LITE49K2
Manufacturer Part Number
ST7LITE49K2
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet
1.ST7LITE49K2.pdf
(245 pages)
Specifications of ST7LITE49K2
8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
10K write/erase cycles guaranteed Data retention
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
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Output compare
In this section, the index, i, may be 1 or 2 because there are two output compare functions in
the 16-bit timer.
This function can be used to control an output waveform or indicate when a period of time
has elapsed.
When a match is found between the output compare register and the free running counter,
the output compare function:
●
●
●
Two 16-bit registers output compare register 1 (OC1R) and output compare register 2
(OC2R) contain the value to be compared to the counter register each timer clock cycle.
These registers are readable and writable and are not affected by the timer hardware. A
reset event changes the OC
Timing resolution is one count of the free running counter: (
Procedure:
To use the output compare function, select the following in the CR2 register:
●
●
In the CR1 register select the following:
●
●
When a match is found between OCRi register and CR register:
●
●
●
Assigns pins with a programmable value if the OCIE bit is set
Sets a flag in the status register
Generates an interrupt if enabled
Set the OCiE bit if an output is needed then the OCMPi pin is dedicated to the output
compare i signal.
Select the timer clock (CC[1:0]) (see
Select the OLVLi bit to be applied to the OCMPi pins after the match occurs.
Set the OCIE bit to generate an interrupt if it is needed.
Set the OCFi bit.
The OCMPi pin takes OLVLi bit value (OCMPi pin latch is forced low during reset).
A timer interrupt is generated if the OCIE bit is set in the CR2 register and the I bit is
cleared in the CC register (CC).
OCiR
i
R value to 8000h.
OCiHR
MSB
: Timer A control register 2 (TACR2) on page
f
CPU/
CC[1:0]
).
OCiLR
LSB
ST7LITE49K2
132).
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