ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 97

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ST7LITE49K2

Manufacturer Part Number
ST7LITE49K2
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LITE49K2

8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
10K write/erase cycles guaranteed Data retention
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow

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ST7LITE49K2
Figure 51. Dynamic DCR2/3 update in one pulse mode
Force update
In order not to wait for the counter
programmable counter
which when set, make the counters start with the overflow value, i.e. FFFh. After overflow,
the counters start counting from their respective auto reload register values.
These bits are FORCE1 and FORCE2 in the ATCSR2 register. FORCE1 is used to force an
overflow on Counter 1 and, FORCE2 is used for Counter 2. These bits are set by software
and reset by hardware after the respective counter overflow event has occurred.
This feature can be used at any time. All related features such as PWM generation, Output
Compare, Input Capture, One-pulse (refer to
pulse
Figure 52. Force overflow timing diagram
FORCE2 FORCE1
mode) etc. can be used this way.
f
counter2
FORCE2
PWM2/3
DCR2/3
TRAN2
CNTR2
LTIC
FORCEx
CNTRx
f
CNTRx
ATCSR2 register
(DCR2/3)
E03
x
000
old
overflow is provided. For both counters, a separate bit is provided
E04
FFF
000
FFF
x
overflow to load the value into active DCRx registers, a
(DCR3)
old
ARRx
extra PWM3 period due to DCR3
update dynamically in one-pulse
mode.
Figure 51: Dynamic DCR2/3 update in one
(DCR2/3)
(DCR3)
new
new
ATR2
On-chip peripherals
000
97/245

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