ST72651AR6 STMicroelectronics, ST72651AR6 Datasheet - Page 43

• Manufacturer Part Number: ST72651AR6
• Description: LOW-POWER, FULL-SPEED USB 8-BIT MCU WITH 32K FLASH, 5K RAM, FLASH CARD I/F, TIMER, PWM, ADC, I2C, SPI
• Manufacturer: STMicroelectronics

Specifications of ST72651AR6

• Dual Supply Management: analog voltage detector on the USB power line to enable smart power switching from USB power to battery (on E suffix devices).
• Programmable Internal Voltage Regulator For Memory Cards (2.8v To 3.5v) Supplying: Flash Card I/O lines (voltage shifting)
• 5 Usb Endpoints: 1 control endpoint
• Dtc (data Transfer Coprocessor): Universal Serial/Parallel communications interface, with software plug-ins for current and future protocol standards

8 POWER SAVING MODES
8.1 INTRODUCTION
To give a large measure of flexibility to the applica-
tion in terms of power consumption, two main pow-
er saving modes are implemented in the ST7.
After a RESET the normal operating mode is se-
lected by default (RUN mode). This mode drives
the device (CPU and embedded peripherals) by
means of a master clock which is based on the
main oscillator frequency divided by 2 (f
From Run mode, the different power saving
modes may be selected by setting the relevant
register bits or by calling the specific ST7 software
instruction whose action depends on the oscillator
status.
The user can also switch off any unused on-chip
peripherals individually by programming the
MISCR2 register.
8.2 WAIT MODE
WAIT mode places the MCU in a low power con-
sumption mode by stopping the CPU.
This power saving mode is selected by calling the
“WFI” ST7 software instruction.
All peripherals remain active. During WAIT mode,
the
enable all interrupts. All other registers and mem-
ory remain unchanged. The MCU remains in WAIT
mode until an interrupt or Reset occurs, whereup-
on the Program Counter branches to the starting
address of the interrupt or Reset service routine.
The MCU will remain in WAIT mode until a Reset
or an Interrupt occurs, causing it to wake up.
Refer to
I1:0] bits
Figure
in the CC register are forced to 0, to
29.
CPU
).
Doc ID 7215 Rev 4
Figure 29. WAIT Mode Flow Chart
Note: Before servicing an interrupt, the CC
register is pushed on the stack. The
set during the interrupt routine and cleared
when the CC register is popped.
N
INTERRUPT
Y
OSCILLATOR
PERIPH. CLOCK
CPU CLOCK
I1:0] BITS
N
OR SERVICE INTERRUPT
OSCILLATOR
PERIPH. CLOCK
CPU CLOCK
FETCH RESET VECTOR
I1:0] BITS
WFI INSTRUCTION
(Refer to
Figure
IF RESET
DELAY
RESET
Figure 19
ST72651AR6
20)
Y
ON
ON
OFF
CLEARED
I1:0] bits
and
ON
ON
ON
SET
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