ST10F276Z5 STMicroelectronics, ST10F276Z5 Datasheet - Page 161

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ST10F276Z5

Manufacturer Part Number
ST10F276Z5
Description
16-BIT MICROCONTROLLER WITH MAC UNIT, UP TO 832 KBYTES FLASH MEMORY AND UP TO 68 KBYTES RAM
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST10F276Z5

Single Voltage Supply
5V ±10% (embedded regulator for 1.8 V core supply)

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ST10F276Z5
Table 71.
XPICON
XIR2SEL
XIR2SET
XIR2CLR
XP1DIDIS
XIR3SEL
XIR3SET
XIR3CLR
XMISC
XEMU0
XEMU1
XEMU2
XEMU3
XPEREMU
XPWMCON0
XPWMCON1
XPOLAR
XPWMCON0SET
XPWMCON0CLR
XPWMCON1SET
XPWMCON1CLR
XPT0
XPT1
XPT2
XPT3
XPP0
XPP1
XPP2
XPP3
XPW0
Name
X-registers ordered by address (continued)
Physical
address
EC0Ch
EB7Ah
EB7Ch
EB7Eh
EC0Ah
EB26h
EB30h
EB32h
EB34h
EB36h
EB40h
EB42h
EB44h
EB46h
EB76h
EB78h
EC00h
EC02h
EC04h
EC06h
EC08h
EC10h
EC12h
EC14h
EC16h
EC20h
EC22h
EC24h
EC26h
EC30h
Extended port input threshold control
register
X-Interrupt 2 selection register
X-Interrupt 2 set register (write-only)
X-Interrupt 2 clear register (write-only)
Port 1 digital disable register
X-Interrupt 3 selection register
X-Interrupt 3 set selection register
(write-only)
X-Interrupt 3 clear selection register
(write-only)
XBUS miscellaneous features register
XBUS emulation register 0 (write-only)
XBUS emulation register 1 (write-only)
XBUS emulation register 2 (write-only)
XBUS emulation register 3 (write-only)
XPERCON copy for emulation (write-only)
XPWM module control register 0
XPWM module control register 1
XPWM module channel polarity register
XPWM module set control register 0
(write-only)
XPWM module clear control reg. 0
(write-only)
XPWM module set control register 0
(write-only)
XPWM module clear control reg. 0
(write-only)
XPWM module up/down counter 0
XPWM module up/down counter 1
XPWM module up/down Counter 2
XPWM module up/down counter 3
XPWM module period register 0
XPWM module period register 1
XPWM module period register 2
XPWM module period register 3
XPWM module pulse width register 0
Description
Reset value
Register set
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
- - 00h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
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