ST10F276Z5 STMicroelectronics, ST10F276Z5 Datasheet - Page 40
ST10F276Z5
Manufacturer Part Number
ST10F276Z5
Description
16-BIT MICROCONTROLLER WITH MAC UNIT, UP TO 832 KBYTES FLASH MEMORY AND UP TO 68 KBYTES RAM
Manufacturer
STMicroelectronics
Datasheet
1.ST10F276Z5.pdf
(239 pages)
Specifications of ST10F276Z5
Single Voltage Supply
5V ±10% (embedded regulator for 1.8 V core supply)
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Internal Flash memory
4.5.6
4.5.7
40/239
Flash non volatile access protection register 0
Due to ST10 architecture, the XFLASH is seen as external memory: this made impossible to
access protect it from real external memory or internal RAM.
FNVAPR0 (0x0E DFB8)
Table 24.
Flash non volatile access protection register 1 low
FNVAPR1L (0x0E DFBC)
Table 25.
PDS15 PDS14 PDS13 PDS12 PDS11 PDS10 PDS9 PDS8 PDS7 PDS6 PDS5 PDS4 PDS3 PDS2 PDS1 PDS0
RW
15
15
PDS(15:0)
DBGP
ACCP
Bit
Bit
RW
14
14
RW
Flash non volatile access protection register 0
Flash non volatile access protection register 1 low
13
13
Access Protection
This bit, if programmed at 0, disables any access (read/write) to data mapped inside
IFlash Module address space, unless the current instruction is fetched from one of the
two Flash modules.
Debug Protection
This bit, if erased at 1, allows to by-pass all the protections using the Debug features
through the Test Interface. If programmed at 0, on the contrary, all the debug features,
the Test Interface and all the Flash Test modes are disabled. Even STMicroelectronics
will not be able to access the device to run any eventual failure analysis.
Protections Disable 15-0
If bit PDSx is programmed at 0 and bit PENx is erased at 1, the action of bit ACCP is
disabled. Bit PDS0 can be programmed at 0 only if bits DBGP and ACCP have already
been programmed at 0. Bit PDSx can be programmed at 0 only if bit PENx-1 has
already been programmed at 0.
RW
12
12
RW
11
11
RW
10
10
RW
reserved
9
9
NVR
NVR
RW
8
8
RW
7
Function
7
Function
RW
6
6
RW
5
5
RW
4
4
RW
3
3
Delivery value: ACFFh
Delivery value: FFFFh
RW
2
2
ST10F276Z5
DBGP
RW
RW
1
1
ACCP
RW
RW
0
0
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