ST10F276Z5 STMicroelectronics, ST10F276Z5 Datasheet - Page 68

• Manufacturer Part Number: ST10F276Z5
• Description: 16-BIT MICROCONTROLLER WITH MAC UNIT, UP TO 832 KBYTES FLASH MEMORY AND UP TO 68 KBYTES RAM
• Manufacturer: STMicroelectronics

Specifications of ST10F276Z5

• Single Voltage Supply: 5V ±10% (embedded regulator for 1.8 V core supply)

Bootstrap loader
5.6.6
Note:
5.6.7
5.6.8
5.6.9
68/239
Exiting alternate boot mode
Once the ABM mode is entered, it can be exited only with a software or hardware reset.
See note from
Alternate boot user software
If the rules described previously are respected (that is, mapping of variables, disabling of
interrupts, exit conditions, predefined vectors in Block 0 of Bank 2, Watchdog usage), then
users can write the software they want to execute in this mode starting from 09’0000h.
User/alternate mode signature integrity check
The behavior of the Alternate Boot mode is based on the computing of a signature between
the content of two memory locations and a comparison with a reference signature. This
requires that users who use Alternate Boot have reserved and programmed the Flash
memory locations according to:
The values for operand0, operand1 and the signature should be such that the sequence
shown in the figure below is successfully executed.
Alternate boot user software aspects
User defined alternate boot code must start at 09’0000h. A new SFR created on the
ST10F276Z5 indicates that the device is running in Alternate Boot mode: Bit 5 of EMUCON
(mapped at 0xFE0Ah) is set when the alternate boot is selected by the reset configuration.
All the other bits are ignored when checking the content of this register to read the value of
bit 5.
This bit is a read-only bit. It remains set until the next software or hardware reset.
MOV
ADD
CPLB
CMP
User mode signature
Alternate mode signature
00'0000h: memory address of operand0 for the signature computing
00’1FFCh: memory address of operand1 for the signature computing
00’1FFEh: memory address for the signature reference
09'0000h: memory address of operand0 for the signature computing
09’1FFCh: memory address of operand1 for the signature computing
09’1FFEh: memory address for the signature reference
Rx, CheckBlock1Addr; 00’0000h for standard reset
Rx, CheckBlock2Addr; 00’1FFCh for standard reset
RLx
Rx, CheckBlock3Addr; 00’1FFEh for standard reset
Section 5.2.7
concerning software reset.
; 1s complement of the lower
; byte of the sum
ST10F276Z5