ST10F276Z5 STMicroelectronics, ST10F276Z5 Datasheet - Page 55
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ST10F276Z5
Manufacturer Part Number
ST10F276Z5
Description
16-BIT MICROCONTROLLER WITH MAC UNIT, UP TO 832 KBYTES FLASH MEMORY AND UP TO 68 KBYTES RAM
Manufacturer
STMicroelectronics
Datasheet
1.ST10F276Z5.pdf
(239 pages)
Specifications of ST10F276Z5
Single Voltage Supply
5V ±10% (embedded regulator for 1.8 V core supply)
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ST10F276Z5
5.3.2
Figure 9.
1.
2.
3.
4.
5.
6.
Entering bootstrap via UART
The device enters BSL mode if pin P0L.4 is sampled low at the end of a hardware reset. In
this case, the built-in bootstrap loader is activated independently of the selected bus mode.
The bootstrap loader code is stored in a special Test-Flash; no part of the standard mask
ROM or Flash memory area is required for this.
After entering BSL mode and the respective initialization, the device scans the RxD0 line to
receive a zero byte, that is, 1 start bit, eight ‘0’ data bits and 1 stop bit. From the duration of
this zero byte, it calculates the corresponding baud rate factor with respect to the current
CPU clock, initializes the serial interface ASC0 accordingly and switches pin TxD0 to output.
Using this baud rate, an acknowledge byte is returned to the host that provides the loaded
data.
The acknowledge byte is D5h for the ST10F276Z5.
BSL initialization time, > 1ms @ fCPU = 40 MHz.
Zero byte (1 start bit, eight ‘0’ data bits, 1 stop bit), sent by host.
Acknowledge byte, sent by the ST10F276Z5.
32 bytes of code / data, sent by host.
Caution: TxD0 is only driven a certain time after reception of the zero byte (1.3ms @ fCPU = 40 MHz).
Internal Boot ROM / Test-Flash.
CSP:IP
RSTIN
P0L.4
RxD0
TxD0
UART bootstrap loader sequence
1)
6)
2)
Int. Boot ROM / Test-Flash BSL-routine
5)
3)
4)
user software
32 bytes
Bootstrap loader
55/239
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