FAN6921MR Fairchild Semiconductor, FAN6921MR Datasheet - Page 21

• Manufacturer Part Number: FAN6921MR
• Description: The highly integrated FAN6921MR combines Power Factor Correction (PFC) controller and Quasi-Resonant PWM controller
• Manufacturer: Fairchild Semiconductor

© 2009 Fairchild Semiconductor Corporation
FAN6921MR Rev. 1.0.2
Protection for PWM Stage
VDD Pin Over-Voltage Protection (OVP)
V
damage once V
rating voltage. In case of V
all switching operation immediately and enters latch-off
mode until the AC plug is removed.
Adjustable Over-Temperature Protection and
Externally Latch Triggering (RT Pin)
Figure 43 is a typical application circuit with an internal
block of RT pin. As shown, a constant current I
out from the RT pin, so the voltage V
be obtained as I
which consists of NTC resistor and R
pin voltage is lower than 0.8V and lasts for a de-bounce
time, latch mode is activated and stops all PFC and
PWM switching.
RT pin is usually used to achieve over-temperature
protection with a NTC resistor and provides external
latch triggering for additional protection. Engineers can
use an external triggering circuit (e.g. transistor) to pull
low the RT pin and activate controller latch mode.
Generally, the external latch triggering needs to activate
rapidly since it is usually used to protect power system
from abnormal conditions. Therefore, the protection
debounce time of the RT pin is set to around 110µs
once RT pin voltage is lower than 0.5V.
For
temperature would not change immediately; the RT pin
voltage is reduced slowly as well. The debounce time
for adjustable OTP should not need a fast reaction. To
prevent improper latch triggering on the RT pin due to
exacting test condition (e.g. lightning test), when the RT
pin triggering voltage is higher than 0.5V, the protection
debounce time is set to around 10ms. To avoid
improper triggering on the RT pin, it is recommended to
add a small value capacitor (e.g. 1000pF) paralleled
with NTC and R
Figure 43. Adjustable Over-Temperature Protection
DD
over-voltage protection is used to prevent device
over-temperature
R
NTC
RT
RT
12
A
DD
resistor.
RT
voltage is higher than device stress
0.5V
0.8V
current multiplied by the resistor,
I
RT
FAN692 1
Adjustable Over-
Temperature protection
External Latch triggering
protection,
DD
=100µA
OVP, the controller stops
Deboun ce
A
RT
time
resistor. If the RT
because
on RT pin can
110µs
10ms
&
Latched
RT
flows
the
Output Over-Voltage Protection (DET Pin)
Referring to Figure 44, during the discharge time of
PWM transformer inductor; the voltage across on
auxiliary winding is reflected from secondary winding
and therefore the flat voltage on the DET pin is
proportional to the output voltage. FAN6921MR can
sample this flat voltage level after a t
perform output over-voltage protection. This t
blanking time is used to ignore the voltage ringing from
leakage inductance of PWM transformer. The sampling
flat voltage level is compared with internal threshold
voltage 2.5V and, once the protection is activated,
FAN6921MR enters latch mode.
The controller can protect rapidly by this kind of cycle-
by-cycle sampling method in the case of output over
voltage. The protection voltage level can be determined
by the ratio of external resistor divider R
flat voltage on DET pin can be expressed by the
following equation:
V
21
DET
Figure 44. Operation Waveform of Output Over-


V
N N
O
PFC

V 
A
N
N
O
A
S
_

N
N
V
R
S
A
S
O
DET


R

N
N
A

V
A
P
R
O
A

Voltage Detection
R
DET
R
A

R
A
OFF
A
blanking time to
and R
www.fairchildsemi.com
DET
. The
OFF
(2)