HFA3863IN96 Intersil Corporation, HFA3863IN96 Datasheet - Page 27
HFA3863IN96
Manufacturer Part Number
HFA3863IN96
Description
Processor, Direct Sequence Spread Spectrum Base band Processor with Rake Receiver and Equalizer, Tape And Reel
Manufacturer
Intersil Corporation
Datasheet
1.HFA3863IN96.pdf
(39 pages)
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bits 6:4
Q DAC clock.
0 = enable.
1 = disable.
RF A/D clock.
0 = enable.
1 = disable.
I A/D clock.
0 = enable.
1 = disable.
Q A/D clock.
0 = enable.
1 = disable.
Standby.
1 = enable.
0 = disable.
SLEEPTX.
1 = enable.
0 = disable.
SLEEP RX.
1 = enable.
0 = disable.
SLEEP IQ.
1 = enable.
0 = disable.
Analog TX Shut_down.
1 = enable.
0 = disable.
Analog RX Shut_down.
1 = enable.
0 = disable.
Analog Standby.
1 = enable.
0 = disable.
Enable manual control of mixed signal power down signals using bits 1:7.
1 = enable.
0 = disable, normal operation (devices controlled by RESET, TX_PE, RX_PE).
Digital format, select output of I/Q and RF A/D converters.
0 = 2s complement.
1 = binary.
I/Q DAC input control. This DAC gives an analog look at various internal digital signals that are suitable for analog
representation.
000 = normal (TX filter).
001 = down converter output.
010 = E/L integrator - upper six bits of the TCHIPacc on (Q) and zeros on (I).
011 = I/ Q A/Ds.
100 = Bigger picker output. Upper 6 bits of FWT_I winner and FWT_Q winner.
101 = CMF weights - upper 6 bits of all 16 CMF weights are circularly shifted with full scale negative sync pulse interleaved
between them.
110 = Test Bus pins (5:0) when configured as inputs, CR32(4), ((5:0) to both I and Q inputs).
111 = Barker Correlator/ low rate samples - as selected by bit 7 CR32.
CONFIGURATION REGISTER 12 ADDRESS (18h) R/W A/D TEST MODES 1 (Continued)
27
CONFIGURATION REGISTER 13 ADDRESS (1Ah) R/W A/D TEST MODES 2
CONFIGURATION REGISTER 14 ADDRESS (1Ch) R/W A/D TEST MODES 3
HFA3863