STG3005A2S STMicroelectronics, STG3005A2S Datasheet - Page 2

• Manufacturer Part Number: STG3005A2S
• Description: 128-BIT 3D MULTIMEDIA ACCELERATOR
• Manufacturer: STMicroelectronics

RIVA128ZX
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RIVA128ZX 300PBGA DEVICE PINOUT.......................................................................................
PIN DESCRIPTIONS ......................................................................................................................
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
OVERVIEW OF THE RIVA128ZX ..................................................................................................
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10 CUSTOMER EVALUATION KIT ............................................................................................
3.11 TURNKEY MANUFACTURING PACKAGE ........................................................................... 13
ACCELERATED GRAPHICS PORT (AGP) INTERFACE ............................................................. 14
4.1
4.2
PCI 2.1 LOCAL BUS INTERFACE.................................................................................................
5.1
5.2
FRAMEBUFFER INTERFACE .......................................................................................................
6.1
6.2
6.3
6.4
6.5
VIDEO PLAYBACK ARCHITECTURE...........................................................................................
7.1
VIDEO PORT ..................................................................................................................................
8.1
8.2
8.3
8.4
8.5
8.6
BOOT ROM INTERFACE...............................................................................................................
ACCELERATED GRAPHICS PORT (AGP) INTERFACE .....................................................
PCI 2.1 LOCAL BUS INTERFACE ........................................................................................
FRAMEBUFFER INTERFACE ..............................................................................................
VIDEO PORT.........................................................................................................................
DEVICE ENABLE SIGNALS ..................................................................................................
DISPLAY INTERFACE ..........................................................................................................
VIDEO DAC AND PLL ANALOG SIGNALS ..........................................................................
POWER SUPPLY ..................................................................................................................
TEST......................................................................................................................................
BALANCED PC SYSTEM......................................................................................................
HOST INTERFACE ...............................................................................................................
2D ACCELERATION .............................................................................................................
3D ENGINE ...........................................................................................................................
VIDEO PROCESSOR............................................................................................................
VIDEO PORT.........................................................................................................................
DIRECT RGB OUTPUT TO LOW COST PAL/NTSC ENCODER .........................................
SUPPORT FOR STANDARDS..............................................................................................
RESOLUTIONS SUPPORTED..............................................................................................
RIVA128ZX AGP INTERFACE ..............................................................................................
AGP BUS TRANSACTIONS..................................................................................................
RIVA128ZX PCI INTERFACE ...............................................................................................
PCI TIMING SPECIFICATION ...............................................................................................
SDRAM INTERFACE ............................................................................................................
SGRAM INTERFACE ............................................................................................................
SDRAM/SGRAM ACCESSES AND COMMANDS ................................................................
LAYOUT OF FRAMEBUFFER CLOCK SIGNALS ................................................................
FRAMEBUFFER INTERFACE TIMING SPECIFICATION ....................................................
VIDEO SCALER PIPELINE ...................................................................................................
VIDEO INTERFACE PORT FEATURES ...............................................................................
BI-DIRECTIONAL MEDIA PORT POLLING COMMANDS USING MPC ..............................
TIMING DIAGRAMS ..............................................................................................................
656 MASTER MODE .............................................................................................................
VBI HANDLING IN THE VIDEO PORT .................................................................................
SCALING IN THE VIDEO PORT ...........................................................................................
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128-BIT 3D MULTIMEDIA ACCELERATOR
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