MBM29PDS322TE Fujitsu Microelectronics, Inc., MBM29PDS322TE Datasheet - Page 31

• Manufacturer Part Number: MBM29PDS322TE
• Description: Flash Memory 32m 2m X 16 Bit Page Dual Operation
• Manufacturer: Fujitsu Microelectronics, Inc.

DQ
DQ
DQ
Exceeded Timing Limits
Sector Erase Timer
Toggle Bit II
See Figure 11 for the Toggle Bit I timing specifications and diagrams.
DQ
these conditions DQ
cycle was not successfully completed. Data Polling is the only operating function of device under this condition.
The CE circuit will partially power down device under these conditions (to approximately 2 mA). The OE and
WE pins will control the output disable functions as described in Table 8.
The DQ
this case the device locks out and never complete the Embedded Algorithm operation. Hence, the system never
read valid data on DQ
indicate a “1.” Please note that this is not a device failure condition since device was incorrectly used. If this
occurs, reset device with command sequence.
After completion of the initial sector erase command sequence sector erase time-out will begin. DQ
low until the time-out is completed. Data Polling and Toggle Bit are valid after the initial sector erase command
sequence.
If Data Polling or the Toggle Bit I indicates device has been written with a valid erase command, DQ
used to determine if the sector erase timer window is still open. If DQ
cycle has begun.If DQ
command has been accepted, the system software should check the status of DQ
subsequent Sector Erase command. If DQ
been accepted.
See Table 9: Hardware Sequence Flags.
This toggle bit II, along with DQ
Algorithm or in Erase Suspend.
Successive reads from the erasing sector will cause DQ
device is in the erase-suspended-read mode, successive reads from the erase-suspended sector will cause DQ
to toggle. When the device is in the erase-suspended-program mode, successive reads from the byte address
of the non-erase suspended sector will indicate a logic “1” at the DQ
DQ
Program operation is in progress. The behavior of these two status bits, along with that of DQ
as follows:
For example, DQ
(DQ
Furthermore, DQ
mode, DQ
To operate toggle bit function properly, CE or OE must be high when bank address is changed.
5
3
2
5
6
2
will indicate if the program or erase time has exceeded the specified limits (internal pulse count). Under
is different from DQ
toggles while DQ
5
failure condition may also appear if a user tries to program a non blank location without pre-erase. In
2
toggles if this bit is read from an erasing sector.
2
2
and DQ
can also be used to determine which sector is being erased. When device is in the erase
5
7
will produce a “1”. This is a failure condition which indicates that the program or erase
6
bit and DQ
3
does not.) See also and.
is low (“0”), the device will accept additional sector erase commands. To insure the
2
6
in that DQ
can be used together to determine if the erase-suspend-read mode is in progress.
6
6
, can be used to determine whether the device is in the Embedded Erase
never stop toggling. Once device has exceeded timing limits, the DQ
6
toggles only when the standard program or Erase, or Erase Suspend
3
were high on the second status check, the command may not have
MBM29PDS322TE/BE
2
to toggle during the Embedded Erase Algorithm. If the
3
2
is high (“1”) the internally controlled erase
bit.
3
prior to and following each
7
, is summarized
3
will remain
3
5
may be
10/11
bit will
2
31