XR17C158 Exar Corporation, XR17C158 Datasheet - Page 13

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XR17C158

Manufacturer Part Number
XR17C158
Description
Eight-channel Pci-based (UART)
Manufacturer
Exar Corporation
Datasheet

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XR17C158
REV. 1.0.0
The XR17C158 has a 32-bit wide register [INT0,
INT1, INT2 and INT3] to provide interrupt information
and supports two interrupt schemes. The first scheme
is a 8-bit indicator representing all 8 channels with
each bit representing each channel from 0 to 7. This
permits the interrupt routine to quickly vector and
1.2.1 The Interrupt Status Register
0x08C-08F
0x080
0x088-08B
0x084-087
0x090-093
A
DDRESS
A
Ox08B0
[A7:A0]
Ox08A
Ox08C
Ox08D
Ox08E
Ox080
Ox081
Ox082
Ox083
Ox084
Ox085
Ox086
Ox087
Ox088
Ox089
Ox08F
Ox090
Ox091
Ox092
Ox093
DDRESS
-
083
PCI BUS OCTAL UART
T
T
ABLE
ANCILLARY1 (read/write)
ANCILLARY2 (read-only)
ABLE
INTERRUPT (read-only)
TIMER (read/write)
MPIO (read/write)
TIMERCNTL
INT2 [23:16]
INT3 [31:24]
4: D
TIMERMSB
INT1 [15:8]
TIMERLSB
3: D
MPIOSEL
INT0 [7:0]
R
8XMODE
MPIOINT
MPIOLVL
MPIOINV
MPIO3T
R
RESET
TIMER
SLEEP
REGA
REGB
EGISTER
DREV
DVID
EGISTER
EVICE
EVICE
C
C
ONFIGURATION
ONFIGURATION
Read-only Interrupt [7:0]
Read-only
Read-only
Read-only
Read/Write Timer Control
Reserved
Read/Write Timer LSB
Read/Write Timer MSB
Read/Write
Reserved
Write-only Self clear bits after executing Reset
Read/Write Sleep mode
Read-only Device revision
Read-only Device identification
Read/Write
Read/Write MPIO interrrupt mask
Read/Write MPIO level control
Read/Write MPIO output control
Read/Write MPIO input polarity select
Read/Write MPIO select
B
TIMERMSB
YTE
MPIOSEL
MPIOINT
SLEEP
INT3
R
3 [31:24]
R
R
EGISTERS SHOWN IN
EAD
EGISTERS SHOWN IN
13
/W
serve that UART channel and determine the
source(s) in each individual routines. INT0 bit-0
represnts the interrupt status for UART channel 0
when its transmitter, receiver, line status, or modem
port status requires service. Other bits in the INT0
register provide indication for the other channels with
bit-7 representing UART channel 7 respectively.
RITE
B
C
YTE
TIMERLSB
OMMENT
MPIOINV
RESET
REGB
INT2[
2 [23:16]
DWORD
BYTE
TIMER (reserved)
REGA (reserved)
B
ALIGNMENT
YTE
MPIO3T
ALIGNMENT
DVID
INT1
1 [15:8]
PRELIMINARY
Bits 7-0 = 0xFF
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x02
Bits 7-0 = 0x28
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
RESET STATE
B
TIMERCNTL
YTE
8XMODE
MPIOLVL
DREV
INT0
0 [7:0]

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