XR17C158 Exar Corporation, XR17C158 Datasheet - Page 23

• Manufacturer Part Number: XR17C158
• Description: Eight-channel Pci-based (UART)
• Manufacturer: Exar Corporation

XR17C158
REV. 1.0.0
Automatic hardware or RTS/DTR and CTS/DSR flow
control is used to prevent data overrun to the local re-
ceiver FIFO and remote receiver FIFO. The RTS#/
DTR# output pin is used to request remote unit to
suspend/restart data transmission while the CTS#/
DSR# input pin is monitored to suspend/restart local
transmitter. The auto RTS/DTR and auto CTS/DSR
flow control features are individually selected to fit
specific application requirement and enabled through
EFR bit-6 and 7 and MCR bit-2 for eiher RTS/CTS or
DTR/DSR control signals. The auto RTS/DTR func-
tion must be started by asserting RTS/DTR# output
pin (MCR bit-0 or 1 to logic 1 after it is enabled.
Figure 9
4.2 A
DSR) F
UTOMATIC
below explains how it works.
LOW
PCI BUS OCTAL UART
H
C
ARDWARE
ONTROL
O
(RTS/CTS
PERATION
OR
DTR/
23
Two interrupts associated with RTS/DTR and CTS/
DSR flow control have been added to give indication
when RTS/DTR# pin or CTS/DSR# pin is de-asserted
during operation. The RTS/DTR and CTS/DSR inter-
rupts must be first enabled by EFR bit-4, and then en-
abled individually by IER bit-6 and 7, and chosen with
MCR bit-2.
Automatic hardware flow control is selected by setting
bits 6 (RTS) and 7 (CTS) of the EFR register to logic
1. If CTS# pin transitions from logic 0 to logic 1 indict-
ing a flow control request, ISR bit-5 will be set to logic
1, (if enabled via IER bit 6-7), and the UART will sus-
pend TX transmissions as soon as the stop bit of the
character in process is shifted out. Transmission is
resumed after the CTS# input returns to logic 0, indi-
cating more data may be sent.
PRELIMINARY