LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 161
LPC47M172
Manufacturer Part Number
LPC47M172
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet
1.LPC47M172.pdf
(227 pages)
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Note 1:
Note 2:
SMSC LPC47M172
GP24
Default = 0x05
N/A
GP1
Default = 0x00
GP2
Default = 0x00
N/A
on VTR POR
on VTR POR
on VTR POR
The In/Out, Polarity and Output Type Select Bits do not apply when DDCSCL/DDCSDA signals are
selected.
If the EETI function is selected for this GPIO then both a high-to-low and low-to-high edge will set the PME
and MSC status bits.
NAME
REG OFFSET
0x0D-0x14
0x17-0x1F
(Type)
(R/W)
(R/W)
(R/W)
0x0C
0x15
0x16
(R)
(R)
DATASHEET
General Purpose I/O bit 2.4
Bit[0] In/Out : =1 Input, =0 Output
Bit[1] Polarity : =1 Invert, =0 No Invert
Bit[2] Alternate Function Select
1=nCDC_DWN_ENAB
0=GPIO
Bits[6:3] Reserved
Bit[7] Output Type Select
1=Open Drain
0=Push Pull
Bits[7:0] Reserved – reads return 0
General Purpose I/O Data Register 1
Bit[0] GP10
Bit[1] GP11
Bit[2] GP12
Bit[3] GP13
Bit[4] GP14
Bit[5] GP15
Bit[6] GP16
Bit[7] GP17
General Purpose I/O Data Register 2
Bit[0] GP20
Bit[1] GP21
Bit[2] GP22
Bit[3] GP23
Bit[4] GP24
Bits[7:5] Reserved
Bits[7:0] Reserved – reads return 0
Page 161
DESCRIPTION
Advanced I/O Controller with Motherboard GLUE Logic
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
Datasheet
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