LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 39
![no-image](/images/no-image-200.jpg)
LPC47M172
Manufacturer Part Number
LPC47M172
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet
1.LPC47M172.pdf
(227 pages)
- Current page: 39 of 227
- Download datasheet (2Mb)
6.4.3
PS/2 Mode
BIT 0 DIRECTION
BIT 1 nWRITE PROTECT
BIT 2 nINDEX
BIT 3 HEAD SELECT
BIT 4 nTRACK 0
BIT 5 STEP
BIT 6 nDRV2
BIT 7 INTERRUPT PENDING
PS/2 Model 30 Mode
BIT 0 DIRECTION
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
RESET
COND.
Status Register A (SRA)
Address 3F0 READ ONLY
This register is read-only and monitors the state of the internal interrupt signal and several disk interface
pins in PS/2 and Model 30 modes. The SRA can be accessed at any time when in PS/2 mode. In the
PC/AT mode the data bus pins D0 – D7 are held in a high impedance state for a read of address 3F0.
Active high status indicating the direction of head movement. A logic “1” indicates inward direction; a logic
“0” indicates outward direction.
Active low status of the WRITE PROTECT disk interface input. A logic “0” indicates that the disk is write
protected.
Active low status of the INDEX disk interface input.
Active high status of the HDSEL disk interface input. A logic “1” selects side 1 and a logic “0” selects side
0.
Active low status of the TRK0 disk interface input.
Active high status of the STEP output disk interface output pin.
This function is not supported. This bit is always read as “1”.
Active high bit indicating the state of the Floppy Disk Interrupt output.
Active low status indicating the direction of head movement. A logic “0” indicates inward direction; a logic
“1” indicates outward direction.
RESET
COND.
PENDIN
INT
G
7
0
PENDING
nDRV2
INT
7
0
6
1
DRQ
STEP
6
0
DATASHEET
5
0
STEP
F/F
5
0
nTRK0
Page 39
N/A
4
TRK0 nHDSEL INDEX
N/A
4
HDSEL
3
0
3
1
Advanced I/O Controller with Motherboard GLUE Logic
N/A
nINDX
2
N/A
2
N/A
WP
1
nWP
N/A
1
nDIR
0
1
SMSC LPC47M172
DIR
0
0
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