PIC16C63A Microchip Technology, PIC16C63A Datasheet - Page 29

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PIC16C63A

Manufacturer Part Number
PIC16C63A
Description
28/40-Pin 8-Bit CMOS Microcontrollers
Manufacturer
Microchip Technology
Datasheet

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3.3
PORTC is an 8-bit wide bi-directional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (=1) will make the corresponding PORTC pin
an input, i.e., put the corresponding output driver in a
hi-impedance mode. Clearing a TRISC bit (=0) will
make the corresponding PORTC pin an output, i.e., put
the contents of the output latch on the selected pin.
PORTC is multiplexed with several peripheral functions
(Table 3-5). PORTC pins have Schmitt Trigger input
buffers.
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an out-
put, while other peripherals override the TRIS bit to
make a pin an input. Since the TRIS bit override is in
effect while the peripheral is enabled, read-modify-
write instructions (BSF, BCF, XORWF) with TRISC as
destination should be avoided. The user should refer to
the corresponding peripheral section for the correct
TRIS bit settings.
EXAMPLE 3-1:
BCF
CLRF
BSF
MOVLW
MOVWF
1998 Microchip Technology Inc.
STATUS, RP0
PORTC
STATUS, RP0
0xCF
TRISC
PORTC and the TRISC Register
INITIALIZING PORTC
; Select Bank 0
; Initialize PORTC by
; clearing output
; data latches
; Select Bank 1
; Value used to
; initialize data
; direction
; Set RC<3:0> as inputs
; RC<5:4> as outputs
; RC<7:6> as inputs
PIC16C63A/65B/73B/74B
FIGURE 3-5:
Peripheral Data Out
Data bus
Note 1: I/O pins have diode protection to V
PORT/PERIPHERAL Select
Peripheral input
Peripheral
OE
WR
TRIS
WR
PORT
(3)
2: Port/Peripheral select signal selects between port
3: Peripheral OE (output enable) is only activated if
data and peripheral output.
peripheral select is active.
RD
PORT
TRIS Latch
Data Latch
D
D
RD TRIS
CK
CK
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE)
Q
Q
Q
Q
0
1
(2)
Q
EN
D
DS30605A-page 29
Schmitt
Trigger
DD
V
V
N
P
and V
SS
DD
I/O
pin
SS
(1)
.

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