PIC16C63A Microchip Technology, PIC16C63A Datasheet - Page 86

• Manufacturer Part Number: PIC16C63A
• Description: 28/40-Pin 8-Bit CMOS Microcontrollers
• Manufacturer: Microchip Technology

PIC16C63A/65B/73B/74B
11.8
On power-up, the time-out sequence is as follows: First
PWRT time-out is invoked after the POR time delay has
expired. Then OST is activated. The total time-out will
vary based on oscillator configuration and the status of
the PWRT. For example, in RC mode with the PWRT
disabled, there will be no time-out at all. Figure 11-7,
Figure 11-8, Figure 11-9 and Figure 11-10 depict time-
out sequences on power-up.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(Figure 11-9). This is useful for testing purposes or to
synchronize more than one PIC16CXXX device operat-
ing in parallel.
Table 11-5 shows the reset conditions for some special
function registers, while Table 11-6 shows the reset
conditions for all the registers.
TABLE 11-3:
TABLE 11-4:
TABLE 11-5:
DS30605A-page 86
Power-on Reset
MCLR Reset during normal operation
MCLR Reset during SLEEP
WDT Reset
WDT Wake-up
Brown-out Reset
Interrupt wake-up from SLEEP
Legend: u = unchanged, x = unknown, - = unimplemented bit read as '0'.
Note 1:
Oscillator Configuration
POR
0
0
0
1
1
1
1
1
Time-out Sequence
XT, HS, LP
When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
BOR
RC
x
x
x
0
1
1
1
1
TIME-OUT IN VARIOUS SITUATIONS
STATUS BITS AND THEIR SIGNIFICANCE
RESET CONDITION FOR SPECIAL REGISTERS
TO
1
0
x
1
0
0
u
1
Condition
PD
1
x
0
1
1
0
u
0
72 ms + 1024T
Power-on Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during SLEEP or interrupt wake-up from SLEEP
PWRTE = 0
72 ms
Power-up
OSC
PWRTE = 1
1024T
Program
PC + 1
Counter
PC + 1
000h
000h
000h
000h
000h
—
OSC
(1)
11.9
The Power Control/Status Register, PCON, has up to
two bits, depending upon the device.
Bit0 is Brown-out Reset Status bit, BOR. If the BODEN
configuration bit is set, BOR is ’1’ on Power-on Reset.
If the BODEN configuration bit is clear, BOR is
unknown on Power-on Reset.
The BOR status bit is a "don't care" and is not neces-
sarily predictable if the brown-out circuit is disabled (the
BODEN configuration bit is clear). BOR must then be
set by the user and checked on subsequent resets to
see if it is clear, indicating a brown-out has occurred.
Bit1 is POR (Power-on Reset Status bit). It is cleared
on a Power-on Reset and unaffected otherwise. The
user must set this bit following a Power-on Reset.
Power Control/Status Register
(PCON)
0001 1xxx
000u uuuu
0001 0uuu
0000 1uuu
uuu0 0uuu
0001 1uuu
uuu1 0uuu
72 ms + 1024T
Register
STATUS
Brown-out
72 ms
OSC
1998 Microchip Technology Inc.
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --u0
---- --uu
Register
Wake-up from
PCON
1024T
SLEEP
—
OSC