PIC16C63A Microchip Technology, PIC16C63A Datasheet - Page 68

no-image

PIC16C63A

Manufacturer Part Number
PIC16C63A
Description
28/40-Pin 8-Bit CMOS Microcontrollers
Manufacturer
Microchip Technology
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C63A
Manufacturer:
MICREL/麦瑞
Quantity:
20 000
Part Number:
PIC16C63A-04/SO
Manufacturer:
MICRCHI
Quantity:
1 000
Part Number:
PIC16C63A-04/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC16C63A-04/SP
Manufacturer:
Microchip Technology
Quantity:
1 821
Part Number:
PIC16C63A-04/SP
Manufacturer:
MOT
Quantity:
50
Part Number:
PIC16C63A-04/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC16C63A-04/SS
Manufacturer:
MICROCHIP
Quantity:
11 246
Part Number:
PIC16C63A-04/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC16C63A-04I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC16C63A-20
Manufacturer:
PIC
Quantity:
5
Part Number:
PIC16C63A-20/SS
Manufacturer:
IR
Quantity:
500
Part Number:
PIC16C63A/JW
Quantity:
90
PIC16C63A/65B/73B/74B
9.2.2
The receiver block diagram is shown in Figure 9-6. The
data is received on the RC7/RX/DT pin and drives the
data recovery block. The data recovery block is actually
a high speed shifter operating at x16 times the baud
rate, whereas the main receive serial shifter operates
at the bit rate or at F
Steps to follow when setting up an Asynchronous
Reception:
1.
2.
FIGURE 9-6:
FIGURE 9-7:
DS30605A-page 68
Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH. (Section 9.1).
Enable the asynchronous serial port by clearing
bit SYNC, and setting bit SPEN.
RX (pin)
Rcv shift
reg
Rcv buffer reg
Read Rcv
buffer reg
RCREG
RCIF
(interrupt flag)
OERR bit
CREN
Note: This timing diagram shows three words appearing on the RX input. The RCREG (receive buffer) is read after the third word,
USART ASYNCHRONOUS RECEIVER
RC7/RX/DT
causing the OERR (overrun) bit to be set.
USART RECEIVE BLOCK DIAGRAM
ASYNCHRONOUS RECEPTION
OSC
Baud Rate Generator
x64 Baud Rate CLK
Start
bit
.
SPBRG
Pin Buffer
and Control
bit0
SPEN
bit1
bit7/8
Data
Recovery
Interrupt
Stop
bit
CREN
WORD 1
RCREG
or
Start
64
16
bit
bit0
RCIF
3.
4.
5.
6.
7.
8.
9.
RCIE
RX9
If interrupts are desired, then set enable bit
RCIE.
If 9-bit reception is desired, then set bit RX9.
Enable the reception by setting bit CREN.
Flag bit RCIF will be set when reception is com-
plete and an interrupt will be generated if enable
bit RCIE was set.
Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
Read the 8-bit received data by reading the
RCREG register.
If any error occurred, clear the error by clearing
enable bit CREN.
MSb
Stop
RX9D
(8)
bit7/8
WORD 2
RCREG
OERR
7
RSR register
Stop
bit
RCREG register
8
Data Bus
Start
bit
1998 Microchip Technology Inc.
1
FERR
0
Start
LSb
bit7/8
FIFO
Stop
bit

Related parts for PIC16C63A