PIC16C63A Microchip Technology, PIC16C63A Datasheet - Page 33

• Manufacturer Part Number: PIC16C63A
• Description: 28/40-Pin 8-Bit CMOS Microcontrollers
• Manufacturer: Microchip Technology

3.5
This
PIC16C65B/PIC16C74B devices only. The A/D multi-
plexed functions are available on the PIC16C74B only.
PORTE has three pins RE0/RD/AN5, RE1/WR/AN6
and RE2/CS/AN7, which are individually configurable
as inputs or outputs. These pins have Schmitt Trigger
input buffers.
I/O PORTE becomes control inputs for the micropro-
cessor port when bit PSPMODE (TRISE<4>) is set. In
this mode, the user must make sure that the
TRISE<2:0> bits are set (pins are configured as digital
inputs). For the PIC16C74B ensure ADCON1 is config-
ured for digital I/O. In this mode, the input buffers are
TTL.
Figure 3-8 shows the TRISE register, which also con-
trols the parallel slave port operation.
PORTE pins for the PIC16C74B only are multiplexed
with analog inputs. When selected as an analog input,
these pins will read as '0's.
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
FIGURE 3-8:
1998 Microchip Technology Inc.
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
R-0
IBF
PORTE and TRISE Register
section
IBF: Input Buffer Full Status bit
1 = A word has been received and is waiting to be read by the CPU
0 = No word has been received
OBF: Output Buffer Full Status bit
1 = The output buffer still holds a previously written word
0 = The output buffer has been read
IBOV: Input Buffer Overflow Detect bit (in microprocessor mode)
1 = A write occurred when a previously input word has not been read (must be cleared in software)
0 = No overflow occurred
PSPMODE: Parallel Slave Port Mode Select bit
1 = Parallel slave port mode
0 = General purpose I/O mode
Unimplemented: Read as '0'
TRISE2: RE2 Direction Control bit
1 = Input
0 = Output
TRISE1: RE2 Direction Control bit
1 = Input
0 = Output
TRISE0: RE2 Direction Control bit
1 = Input
0 = Output
OBF
R-0
TRISE REGISTER (ADDRESS 89h)
is
R/W-0
IBOV
applicable
PSPMODE
R/W-0
to
U-0
—
the
PIC16C63A/65B/73B/74B
TRISE2
R/W-1
FIGURE 3-7:
TRISE1
Note:
Note 1: I/O pins have protection diodes to V
R/W-1
Data
bus
WR
TRIS
WR
PORT
RD PORT
On a Power-on Reset these pins are con-
figured as analog inputs.
TRISE0
R/W-1
TRIS Latch
Data Latch
D
D
CK
CK
bit0
RD TRIS
PORTE BLOCK DIAGRAM
(IN I/O PORT MODE)
Q
Q
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
Q
read as ‘0’
EN
Schmitt
Trigger
input
buffer
EN
D
DS30605A-page 33
DD
I/O pin
and V
SS
(1)
.