AD6426 Analog Devices, AD6426 Datasheet - Page 12

• Manufacturer Part Number: AD6426
• Description: Enhanced GSM Processor
• Manufacturer: Analog Devices

This Information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog Devices assumes no
obligation regarding future manufacture unless otherwise agreed to in writing. No responsibility is assumed by Analog Devices for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent
rights of Analog Devices.
Revision Preliminary 2.3 (June 9, ´98)
64/65
Preliminary Technical Information
10
10
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11
12
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15
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26
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48
49
50
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#
0
1
2
3
4
5
6
Error Rx FIFO
Error Rx FIFO
FIFO ST
FIFO ST
DLAB
DLAB
TDRE
TEST
DCD
DCD
TIE
7
RxLevel[1:0]
RX MODE
SET BRK
SET BRK
FIFO ST
Chars in TX Buffer [3:0]
FIFO ST
SDORIE
TEMT
TEMT
RDRF
Tx Trigger Level [3:0]
RIE
RI
RI
6
Table 4. H8 Peripheral Register Contents
SDIROE IE
Stick Par.
Stick Par.
CLOCK
ORER
THRE
THRE
DSR
DSR
TE
TE
5
Break Interrupt
Break Interrupt
TX ENABLE
Ev. Parity
Ev. Parity
SDIRIE
- 12 -
ODD
Loop
Loop
ERS
CTS
CTS
Transmit[15:8]
Receive[15:8]
RE
Transmit[7:0]
RE
Transmit[7:0]
Receive[7:0]
Receive[7:0]
4
RxData[7:0]
TxData[7:0]
RxData[7:0]
TxData[7:0]
RxData[7:0]
TxData[7:0]
BRR[15:8]
BRR[15:8]
BRR[7:0]
BRR[7:0]
Data[7:0]
SCR[7:0]
SCR[7:0]
InterruptID[2:0]
CROSSPOINT
Framing Error
Framing Error
Parity EN
Parity EN
MODEM
SWITCH
DDCD
DDCD
EDSSI
EDSSI
DMA
Out2
Out2
PER
AE
FE
3
InterruptID[2:0]
SDOR EMT
Parity Error
Parity Error
MRESET
TX Level
SWITCH
TX FIFO
Stop Bits
Stop Bits
UCONN
DATEN
Int Pend
TEND
TERI
TERI
ELSI
Out1
ELSI
Out1
PE
2
BRR[3:0]
Confidential Information
Chars in Rx Buffer [3:0]
Rx Trigger Level [3:0]
Overrun Error
Overrun Error
UIB Enable
WLS[1:0]
CLKPOL
SDIR OE
RX FIFO
RX Time
ETBEI
ETBEI
DDSR
DDSR
RTS
RTS
R/W
BI
1
R
WLS[1:0]
AD6426
SDIR FULL
Data Ready
Data Ready
RX Level
FIFO EN
CLKEN
Int Pend
ERBFI
ERBFI
DCTS
PROC
DCTS
DTR
DTR
R/W
OE
0