MC72000 Freescale Semiconductor, MC72000 Datasheet - Page 109

• Manufacturer Part Number: MC72000
• Description: Integrated Bluetooth Radio
• Manufacturer: Freescale Semiconductor

7.4.6.1.1.3
Gated clock mode is often used to hook up to SPI-type interfaces on microcontroller units (MCUs) or
external peripheral chips. In gated clock mode, the presence of the clock indicates that valid data is on the
STXD or SRXD pins. For this reason, no frame sync is needed in this mode. Once transmission of data has
completed, the clock is stopped.
Since gated clock mode is a synchronous mode (see Table 51), only the STCK is used. This clock can be
generated internally (master mode) or externally (slave mode). Several operating modes are possible as
detailed in Table 54.
For the case of internally generated clock, all internal bit clocks, word clocks, and frame clocks continue to
operate (although frame clock is ignored). When data is written to the STX register, the clock will operate
starting when the next word clock (time-slot) occurs. This allows data to be transferred out in periodic
intervals in gated clock mode.
With an external clock, the SSI waits for a clock signal to be received. Once the clock begins, valid data is
shifted in/out.
Figure 73 shows a gated clock timing diagram with comments in Table 55.
MOTOROLA
TE
Enables
0
0
1
1
RE
0
1
0
1
Internal or external
Internal or external
Possible Clock
Gated Clock Operation
The bit clock pins must be kept free of timing glitches. If a single glitch
occurs, all ensuing transfers will be out of synchronization.
Table 54. Transmit and Receive Enables in Gated Clock Mode
External
Source
Freescale Semiconductor, Inc.
For More Information On This Product,
MC72000 Advance Information Data Sheet
Not operational
Receive only -- receiver gets data when clocks occur
Transmit only -- data transfer as clocks occur
Transmit and receive operate synchronously -- data is transferred as clocks
occur
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Preliminary
NOTE:
Operating Mode
Hardware Functional Description
109