MC72000 Freescale Semiconductor, MC72000 Datasheet - Page 90

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MC72000

Manufacturer Part Number
MC72000
Description
Integrated Bluetooth Radio
Manufacturer
Freescale Semiconductor
Datasheet
Hardware Functional Description
RSCKP—Receive Clock Polarity
RDMAE—Receive DMA Enable
TDMAE—Transmit DMA Enable
RFSI—Receive Frame Sync Invert
RFSL—Receive Frame Sync Length
90
This bit controls which bit clock edge is used to latch in data for the receive section.
This bit is Reserved and should always be written 0.
This bit is Reserved and should always be written 0.
This bit selects the logic of frame sync I/O for the receive section.
This bit selects the length of the frame sync signal to be generated or recognized for the receive section.
See Figure 60 for an example timing diagram of the FS options.
The length of a word-long frame sync is the same as the length of the data word selected by WL[1:0].
1 = The rising edge of the clock is used to latch the data in
0 = The data is latched in on the falling edge of the clock
1 = The frame sync is active low
0 = The frame sync is active high
1 = A one clock bit-long frame sync is selected
0 = A one word-long frame sync is selected
The CODEC device labels the MSB as bit 0, whereas the SSI labels the
LSB as bit 0. Therefore, when using a standard CODEC, the SSI MSB (or
CODEC bit 0) is shifted out first, and the RSHFD bit should be cleared.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC72000 Advance Information Data Sheet
Go to: www.freescale.com
Preliminary
NOTE:
MOTOROLA

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