MC72000 Freescale Semiconductor, MC72000 Datasheet - Page 93

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MC72000

Manufacturer Part Number
MC72000
Description
Integrated Bluetooth Radio
Manufacturer
Freescale Semiconductor
Datasheet
Freescale Semiconductor, Inc.
Hardware Functional Description
The TFE bit is set by power-on reset and when SSI is disabled.
STCK, SRCK
Bit-Length FS
early Bit-Length FS
Word-Length FS
early Word-Length FS
Time slots
TS n
TS 0
TS 1
a) Frame Sync Timing Options
STX register
TFS
STXD pin
b) TFS Status Flag Operation
SRXD pin
RFS
SRX register
c) RFS Status Flag Operation
Valid
Invalid
Indefinite transition depends on SW interrupt processing
Figure 60. Frame Sync Timing Options
7.4.5.2.9
SSI Control Register 2 (SCR2)
The SSI Control Register 2 (SCR2) is one of three 16-bit control registers that select the operating mode for
the SSI.
Interrupt enable bits for the receive and transmit sections are provided in this control register. Before they
can function, the chip level interrupt priority register (IPR) must be set to enable SSI interrupts.
Power-on reset clears all SCR2 bits. However, SSI reset does not affect the SCR2 bits. The SCR2 bits are
described in the following sections.
MOTOROLA
MC72000 Advance Information Data Sheet
93
For More Information On This Product,
Preliminary
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