MC72000 Freescale Semiconductor, MC72000 Datasheet - Page 32

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MC72000

Manufacturer Part Number
MC72000
Description
Integrated Bluetooth Radio
Manufacturer
Freescale Semiconductor
Datasheet
Freescale Semiconductor, Inc.
Radio Functional Description
6.1 RF Receive Chain
The MC72000 is placed into the receive mode from the idle mode by asserting the internal RXTXEN
master signal after setting the Radio Receive Enable bit (R2/13), clearing the Radio Transmit Enable bit
(R2/14), and clearing the Radio Narrow Bandwidth Enable bit (R2/12). The data represents a 6-Bit,
2’s-complement digital value and is sampled four times for every data bit. Once the receive cycle is
complete, the RXTXEN master signal to the radio is deasserted and the MC72000 begins an internal power
down sequence. This is all controlled by the internal baseband processor. The receive chain is optimized to
provide high adjacent channel rejection, which is the most important specification in a high interference
environment. This is accomplished by setting the IF bandpass filter to 720 kHz and then using Maximum
Likelihood Sequence Estimation (MLSE) in baseband processing to remove the effects of intersymbol
interference.
A low voltage SPI interface is used between the radio and the baseband processor. The baseband
synchronizes the radio timing through the master RXTXEN signal to the radio. A logic low transition on
this signal indicates the beginning of idle state, while a logic high transition indicates either transmit or a
receive cycle.
6.2 RF Transmit Chain
The MC72000 is placed into the transmit mode from the idle mode by setting the Radio Transmit Enable
bit (R2/14), setting the Radio Narrow Bandwidth Enable bit (R2/12), and clearing the Radio Receive
Enable bit (R2/13) of the Radio Register Map, then asserting the RTXEN pin of the device. Once the data
stream has been transmitted, the RTXEN pin is deasserted and the MC72000 begins an internal power
down sequence. Since RF power is still present at the PA output, no SPI operations or additional cycles
between the radio and the baseband processor can be performed until a certain amount of time has passed
after the deassertion of RXTXEN. At this time, RF power is at a substantially low enough level so as not to
produce undesired emissions. The internal baseband processor also handles this timing.
6.3 Receiver
The MC72000 receiver is intended to be used in Time Division Duplex (TDD), Frequency Hopping
Spread Spectrum (FHSS) Bluetooth applications. The receiver uses a low intermediate frequency (IF) of
6.0 MHz and is capable of receiving up to 1.0 Mbit/s Gaussian Frequency Shift Keyed (GFSK) serial data
through the entire 2.4 GHz Industrial, Scientific, and Medical (ISM) band. The output of the receiver is a
demodulated, serial bit stream of 24 Mbit/s data. This data represents a 4X over sample by a 6-bit D/A of
the actual demodulated analog data recovered from the desired channel. A detailed discussion of each of
the functional blocks within the receiver is provided in the following sections.
6.3.1 LNA
The first portion of the receiver chain is the Low Noise Amplifier (LNA). The LNA is a bipolar cascode
design and provides gain with low noise at RF frequencies. The LNA is designed with a single-ended
(unbalanced) input and is converted to a differential (balanced) output by means of an on-chip, integrated
balun.
For optimum performance, the LNA input impedance must be matched to the complex conjugate of the
source impedance (usually 50 Ω).
The LNA of the MC72000 exhibits two distinctly different impedances depending upon whether the LNA
is active or disabled. During a receive cycle, the S11 of the LNA is shown in the Table 16.
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MC72000 Advance Information Data Sheet
MOTOROLA
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